Joseph A. Bailey

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Arrangement in a channel adapter for transmitting data according to...
- Patent number 7,519,089
- Issue date Apr 14, 2009
- Advanced Micro Devices, Inc.
- Joseph Winkles
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Arrangement in a channel adapter for segregating transmit packet da...
- Patent number 7,292,593
- Issue date Nov 6, 2007
- Advanced Micro Devices, Inc.
- Joseph Winkles
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Embedded channel adapter having link layer configured for concurren...
- Patent number 7,266,614
- Issue date Sep 4, 2007
- Advanced Micro Devices, Inc.
- Joseph D. Winkles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arrangement in a channel adapter for validating headers concurrentl...
- Patent number 7,245,613
- Issue date Jul 17, 2007
- Advanced Micro Devices, Inc.
- Joseph Winkles
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Arrangement in a channel adapter for servicing work notifications b...
- Patent number 7,209,489
- Issue date Apr 24, 2007
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Embedded channel adapter having transport layer configured for prio...
- Patent number 7,076,569
- Issue date Jul 11, 2006
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Arrangement for implementing kernel bypass for access by user mode...
- Patent number 7,003,586
- Issue date Feb 21, 2006
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reordering transactions in a packet-based...
- Patent number 6,950,886
- Issue date Sep 27, 2005
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault tolerant computing node having multiple host channel adapters
- Patent number 6,904,545
- Issue date Jun 7, 2005
- Advanced Micro Devices, Inc.
- Bahadir Erimli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Manipulating work queue elements via a hardware adapter and softwar...
- Patent number 6,832,310
- Issue date Dec 14, 2004
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arrangement for instigating work in a channel adapter based on rece...
- Patent number 6,742,075
- Issue date May 25, 2004
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arrangement for limiting access to addresses by a consumer process...
- Patent number 6,598,144
- Issue date Jul 22, 2003
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Point-to-point interrupt messaging within a multiprocessing compute...
- Patent number 6,295,573
- Issue date Sep 25, 2001
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for distributing interrupts in a multi-processor system
- Patent number 6,205,508
- Issue date Mar 20, 2001
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for using random access memory in a programmable...
- Patent number 5,894,578
- Issue date Apr 13, 1999
- Advanced Micro Devices, Inc.
- Qadeer A. Qureshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial bus for transmitting interrupt information in a multiprocess...
- Patent number 5,892,956
- Issue date Apr 6, 1999
- Advanced Micro Devices, Inc.
- Qadeer A. Qureshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for referencing interrupt request information in...
- Patent number 5,850,558
- Issue date Dec 15, 1998
- Advanced Micro Devices
- Qadeer A. Qureshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for validating interrupts before presentation to...
- Patent number 5,850,555
- Issue date Dec 15, 1998
- Advanced Micro Devices, Inc.
- Qadeer A. Qureshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for writing back selected doublewords of cached dirty dat...
- Patent number 5,802,559
- Issue date Sep 1, 1998
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fail-safe method to read a timer which is based on a particular clo...
- Patent number 5,703,919
- Issue date Dec 30, 1997
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- G04 - HOROLOGY
Information Patent Grant
Heuristic prefetch mechanism and method for computer system
- Patent number 5,666,505
- Issue date Sep 9, 1997
- Advanced Micro Devices, Inc.
- Joseph A. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism and protocol for maintaining cache coherency within an in...
- Patent number 5,557,769
- Issue date Sep 17, 1996
- Advanced Micro Devices
- Joseph A. Bailey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock control technique and system for a microprocessor including a...
- Patent number 5,451,892
- Issue date Sep 19, 1995
- Advanced Micro Devices
- Joseph A. Bailey
- G06 - COMPUTING CALCULATING COUNTING

Joseph A. Bailey

Person

Patents Grantslast 30 patents

Arrangement in a channel adapter for transmitting data according to...

Arrangement in a channel adapter for segregating transmit packet da...

Embedded channel adapter having link layer configured for concurren...

Arrangement in a channel adapter for validating headers concurrentl...

Arrangement in a channel adapter for servicing work notifications b...

Embedded channel adapter having transport layer configured for prio...

Arrangement for implementing kernel bypass for access by user mode...

Method and apparatus for reordering transactions in a packet-based...

Fault tolerant computing node having multiple host channel adapters

Manipulating work queue elements via a hardware adapter and softwar...

Arrangement for instigating work in a channel adapter based on rece...

Arrangement for limiting access to addresses by a consumer process...

Point-to-point interrupt messaging within a multiprocessing compute...

Method for distributing interrupts in a multi-processor system

System and method for using random access memory in a programmable...

Serial bus for transmitting interrupt information in a multiprocess...

System and method for referencing interrupt request information in...

System and method for validating interrupts before presentation to...

Mechanism for writing back selected doublewords of cached dirty dat...

Fail-safe method to read a timer which is based on a particular clo...

Heuristic prefetch mechanism and method for computer system

Mechanism and protocol for maintaining cache coherency within an in...

Clock control technique and system for a microprocessor including a...