Joseph Cheng

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TaoYuan, TW

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Patents Grantslast 30 patents

Information Patent Grant
Substrate structure and the fabrication method thereof
- Patent number 7,585,419
- Issue date Sep 8, 2009
- Boardtek Electronics Corp.
- Joseph Cheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Package structure of chip and the package method thereof
- Patent number 7,556,984
- Issue date Jul 7, 2009
- Boardtek Electronics Corp.
- Joseph Cheng
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Chip-package structure and fabrication process thereof
- Publication number 20060284290
- Publication date Dec 21, 2006
- Joseph Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Substrate structure and the fabrication method thereof
- Publication number 20060286485
- Publication date Dec 21, 2006
- Joseph Cheng
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Package structure of chip and the package method thereof
- Publication number 20060284292
- Publication date Dec 21, 2006
- Joseph Cheng
- H01 - BASIC ELECTRIC ELEMENTS