Joseph D. Linoff

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
System and method for controlled performance degradation in electro...
- Patent number 6,078,209
- Issue date Jun 20, 2000
- Xilinx, Inc.
- Joseph D. Linoff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circuit and method for generating clock signals with an incremental...
- Patent number 6,043,692
- Issue date Mar 28, 2000
- Xilinx, Inc.
- Joseph D. Linoff
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Logic cell and routing architecture in a field programmable gate array
- Patent number 5,594,363
- Issue date Jan 14, 1997
- Zycad Corporation
- Richard D. Freeman
- H03 - BASIC ELECTRONIC CIRCUITRY