Joseph H. Neal

Person

Sugarland, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
High-speed memory arranged for operating synchronously with a micro...
- Patent number 6,088,280
- Issue date Jul 11, 2000
- Texas Instruments Incorporated
- Wilbur Christian Vogley
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed memory arranged for operating synchronously with a micro...
- Patent number 5,982,694
- Issue date Nov 9, 1999
- Texas Instruments Incorporated
- Wilbur Christian Vogley
- G11 - INFORMATION STORAGE
Information Patent Grant
Data processing system arranged for operating synchronously with a...
- Patent number 5,912,854
- Issue date Jun 15, 1999
- Texas Instruments Incorporated
- Wilbur Christian Vogley
- G11 - INFORMATION STORAGE
Information Patent Grant
Random access memory with latency arranged for operating synchronou...
- Patent number 5,808,958
- Issue date Sep 15, 1998
- Texas Instruments Incorporated
- Wilbur Christian Vogley
- G11 - INFORMATION STORAGE
Information Patent Grant
Time multiplexed addressing circuitry
- Patent number 5,745,088
- Issue date Apr 28, 1998
- Texas Instruments Incorporated
- Kevin L. Kornher
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Apparatus and method for a memory unit with a processor integrated...
- Patent number 5,678,021
- Issue date Oct 14, 1997
- Texas Instruments Incorporated
- Basavaraj I. Pawate
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Random access memory arranged for operating synchronously with a mi...
- Patent number 5,587,954
- Issue date Dec 24, 1996
- Texas Instruments Incorporated
- Wilbur C. Vogley
- G11 - INFORMATION STORAGE
Information Patent Grant
System including a data processor, a synchronous dram, a peripheral...
- Patent number 5,390,149
- Issue date Feb 14, 1995
- Texas Instruments Incorporated
- Wilbur C. Vogley
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory module arranged for data and parity bits
- Patent number 5,228,132
- Issue date Jul 13, 1993
- Texas Instrument Incorporated
- Joseph H. Neal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module arranged for data and parity bits
- Patent number 5,089,993
- Issue date Feb 18, 1992
- Texas Instruments Incorporated
- Joseph H. Neal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed concurrent testing of dynamic read/write memory array
- Patent number 4,868,823
- Issue date Sep 19, 1989
- Texas Instruments Incorporated
- Lionel S. White
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed concurrent testing of dynamic read/write memory array
- Patent number 4,654,849
- Issue date Mar 31, 1987
- Texas Instruments Incorporated
- Lionel S. White
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic memory with improved address counter for serial modes
- Patent number 4,618,947
- Issue date Oct 21, 1986
- Texas Instruments Incorporated
- Bao G. Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Virtual ground MOS EPROM or ROM matrix
- Patent number 4,281,397
- Issue date Jul 28, 1981
- Texas Instruments Incorporated
- Joseph H. Neal
- G11 - INFORMATION STORAGE

Joseph H. Neal

Person

Patents Grantslast 30 patents

High-speed memory arranged for operating synchronously with a micro...

High speed memory arranged for operating synchronously with a micro...

Data processing system arranged for operating synchronously with a...

Random access memory with latency arranged for operating synchronou...

Time multiplexed addressing circuitry

Apparatus and method for a memory unit with a processor integrated...

Random access memory arranged for operating synchronously with a mi...

System including a data processor, a synchronous dram, a peripheral...

Memory module arranged for data and parity bits

Memory module arranged for data and parity bits

High speed concurrent testing of dynamic read/write memory array

High speed concurrent testing of dynamic read/write memory array

Dynamic memory with improved address counter for serial modes

Virtual ground MOS EPROM or ROM matrix