Joseph MINACAPELLI

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Extended through wafer vias for power delivery in face-to-face dies
- Patent number 11,973,060
- Issue date Apr 30, 2024
- NVIDIA Corporation
- Joseph Greco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Face-to-face dies with probe pads for pre-assembly testing
- Patent number 11,699,662
- Issue date Jul 11, 2023
- NVIDIA Corporation
- Joseph Greco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Face-to-face dies with a void for enhanced inductor performance
- Patent number 11,616,023
- Issue date Mar 28, 2023
- NVIDIA Corporation
- Joseph Greco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Face-to-face dies with enhanced power delivery using extended TSVS
- Patent number 11,127,719
- Issue date Sep 21, 2021
- NVIDIA Corporation
- Joseph Greco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System with a high power chip and a low power chip having low inter...
- Patent number 9,728,481
- Issue date Aug 8, 2017
- NVIDIA Corporation
- Abraham F. Yee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Removable substrate for controlling warpage of an integrated circui...
- Patent number 9,425,171
- Issue date Aug 23, 2016
- NVIDIA Corporation
- Joseph Minacapelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-configuration GPU interface device
- Patent number 8,698,305
- Issue date Apr 15, 2014
- NVIDIA Corporation
- Thomas E. Dewey
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multi-configuration GPU interface device
- Patent number 6,797,998
- Issue date Sep 28, 2004
- NVIDIA Corporation
- Thomas E. Dewey
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
VIA-BASED INDUCTOR COIL FOR INTEGRATED SILICON APPLICATIONS
- Publication number 20240266106
- Publication date Aug 8, 2024
- NVIDIA Corp.
- Joseph Minacapelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FACE-TO-FACE DIES WITH A VOID FOR ENHANCED INDUCTOR PERFORMANCE
- Publication number 20230230925
- Publication date Jul 20, 2023
- NVIDIA Corporation
- Joseph Greco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EXTENDED THROUGH WAFER VIAS FOR POWER DELIVERY IN FACE-TO-FACE DIES
- Publication number 20210384168
- Publication date Dec 9, 2021
- NVIDIA Corporation
- Joseph Greco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FACE-TO-FACE DIES WITH A VOID FOR ENHANCED INDUCTOR PERFORMANCE
- Publication number 20210233849
- Publication date Jul 29, 2021
- NVIDIA Corporation
- Joseph Greco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FACE-TO-FACE DIES WITH PROBE PADS FOR PRE-ASSEMBLY TESTING
- Publication number 20210233850
- Publication date Jul 29, 2021
- NVIDIA Corporation
- Joseph Greco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FACE-TO-FACE DIES WITH ENHANCED POWER DELIVERY USING EXTENDED TSVS
- Publication number 20210233893
- Publication date Jul 29, 2021
- Joseph Greco
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REMOVABLE SUBSTRATE FOR CONTROLLING WARPAGE OF AN INTEGRATED CIRCUI...
- Publication number 20160379939
- Publication date Dec 29, 2016
- NVIDIA Corporation
- Joseph MINACAPELLI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM WITH A HIGH POWER CHIP AND A LOW POWER CHIP HAVING LOW INTER...
- Publication number 20130058067
- Publication date Mar 7, 2013
- Abraham F. YEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-configuration GPU interface device
- Publication number 20040012082
- Publication date Jan 22, 2004
- Thomas E. Dewey
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Joseph MINACAPELLI

Person

Patents Grantslast 30 patents

Extended through wafer vias for power delivery in face-to-face dies

Face-to-face dies with probe pads for pre-assembly testing

Face-to-face dies with a void for enhanced inductor performance

Face-to-face dies with enhanced power delivery using extended TSVS

System with a high power chip and a low power chip having low inter...

Removable substrate for controlling warpage of an integrated circui...

Multi-configuration GPU interface device

Multi-configuration GPU interface device

Patents Applicationslast 30 patents

VIA-BASED INDUCTOR COIL FOR INTEGRATED SILICON APPLICATIONS

FACE-TO-FACE DIES WITH A VOID FOR ENHANCED INDUCTOR PERFORMANCE

EXTENDED THROUGH WAFER VIAS FOR POWER DELIVERY IN FACE-TO-FACE DIES

FACE-TO-FACE DIES WITH A VOID FOR ENHANCED INDUCTOR PERFORMANCE

FACE-TO-FACE DIES WITH PROBE PADS FOR PRE-ASSEMBLY TESTING

FACE-TO-FACE DIES WITH ENHANCED POWER DELIVERY USING EXTENDED TSVS

REMOVABLE SUBSTRATE FOR CONTROLLING WARPAGE OF AN INTEGRATED CIRCUI...

SYSTEM WITH A HIGH POWER CHIP AND A LOW POWER CHIP HAVING LOW INTER...

Multi-configuration GPU interface device