Joseph Murray

Person

Scottsdale, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and an apparatus with a sideband interface interconnecting...
- Patent number 9,753,875
- Issue date Sep 5, 2017
- Intel Corporation
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low-latency internode communication
- Patent number 9,665,415
- Issue date May 30, 2017
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing multiple decode options for a system-on-chip (SoC) fabric
- Patent number 9,658,978
- Issue date May 23, 2017
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sideband parity handling
- Patent number 9,602,237
- Issue date Mar 21, 2017
- Intel Corporation
- Robert P. Adler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Supporting multiple channels of a single interface
- Patent number 9,489,329
- Issue date Nov 8, 2016
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic link width adjustment
- Patent number 9,292,465
- Issue date Mar 22, 2016
- Intel Corporation
- Malay Trivedi
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Aggregating completion messages in a sideband interface
- Patent number 9,270,576
- Issue date Feb 23, 2016
- Intel Corporation
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Common idle state, active state and credit management for an interface
- Patent number 9,122,815
- Issue date Sep 1, 2015
- Intel Corporation
- Sridhar Lakshmanamurthy
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Flexibly integrating endpoint logic into varied platforms
- Patent number 9,122,811
- Issue date Sep 1, 2015
- Intel Corporation
- Michael Klinglesmith
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Issuing requests to a fabric
- Patent number 9,075,929
- Issue date Jul 7, 2015
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Issuing requests to a fabric
- Patent number 9,064,051
- Issue date Jun 23, 2015
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexibly integrating endpoint logic into varied platforms
- Patent number 8,831,029
- Issue date Sep 9, 2014
- Intel Corporation
- Michael Klinglesmith
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Common idle state, active state and credit management for an interface
- Patent number 8,805,926
- Issue date Aug 12, 2014
- Intel Corporation
- Sridhar Lakshmanamurthy
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Issuing requests to a fabric
- Patent number 8,775,700
- Issue date Jul 8, 2014
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aggregating completion messages in a sideband interface
- Patent number 8,711,875
- Issue date Apr 29, 2014
- Intel Corporation
- Sridhar Lakshmanamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Supporting multiple channels of a single interface
- Patent number 8,713,234
- Issue date Apr 29, 2014
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing multiple decode options for a system-on-chip (SoC) fabric
- Patent number 8,713,240
- Issue date Apr 29, 2014
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexibly integrating endpoint logic into varied platforms
- Patent number 8,537,848
- Issue date Sep 17, 2013
- Intel Corporation
- Michael Klinglesmith
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flexibly integrating endpoint logic into varied platforms
- Patent number 8,537,820
- Issue date Sep 17, 2013
- Intel Corporation
- Michael Klinglesmith
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Flexibly integrating endpoint logic into varied platforms
- Patent number 7,873,068
- Issue date Jan 18, 2011
- Intel Corporation
- Michael Klinglesmith
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Use of bus transaction identification codes
- Patent number 7,124,230
- Issue date Oct 17, 2006
- Intel Corporation
- David Russell Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase lock loop system and method
- Patent number 6,577,174
- Issue date Jun 10, 2003
- Honeywell International Inc.
- Kevin Wayne Locker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for repeating (extending) transactions on a bu...
- Patent number 6,567,871
- Issue date May 20, 2003
- Intel Corporation
- Lee K. Koh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase lock loop system and method
- Patent number 6,297,702
- Issue date Oct 2, 2001
- Honeywell International Inc.
- Kevin Wayne Locker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processor having integrated boolean and adder logic for accele...
- Patent number 6,070,182
- Issue date May 30, 2000
- Intel Corporation
- Ravi S. Rao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for pseudo-synchronous communication between c...
- Patent number 6,067,629
- Issue date May 23, 2000
- Intel Corporation
- Joseph Murray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low ICC enumeration scheme for bus powered USB device
- Patent number 5,987,617
- Issue date Nov 16, 1999
- Intel Corporation
- King-Seng Hu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache controller and method for dumping contents of a cache directo...
- Patent number 5,537,572
- Issue date Jul 16, 1996
- VLSI Technology, Inc.
- Jeff M. Michelsen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for performing writes of non-contiguous bytes on a PCI bus i...
- Patent number 5,448,704
- Issue date Sep 5, 1995
- VLSI Technology, Inc.
- David G. Spaniol
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-compensating output pad for an integrated circuit and method t...
- Patent number 5,365,130
- Issue date Nov 15, 1994
- VLSI Technology, Inc.
- Joseph Murray
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
LOW-LATENCY INTERNODE COMMUNICATION
- Publication number 20170091003
- Publication date Mar 30, 2017
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIDEBAND PARITY HANDLING
- Publication number 20160182186
- Publication date Jun 23, 2016
- Intel Corporation
- Robert P. Adler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
AGGREGATING COMPLETION MESSAGES IN A SIDEBAND INTERFACE
- Publication number 20160132447
- Publication date May 12, 2016
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Issuing Requests To A Fabric
- Publication number 20150113189
- Publication date Apr 23, 2015
- Intel Corporation
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Common Idle State, Active State And Credit Management For An Interface
- Publication number 20150012681
- Publication date Jan 8, 2015
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Issuing Requests To A Fabric
- Publication number 20140289435
- Publication date Sep 25, 2014
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Providing Multiple Decode Options For A System-On-Chip (SoC) Fabric
- Publication number 20140258583
- Publication date Sep 11, 2014
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AGGREGATING COMPLETION MESSAGES IN A SIDEBAND INTERFACE
- Publication number 20140258492
- Publication date Sep 11, 2014
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Supporting Multiple Channels Of A Single Interface
- Publication number 20140258578
- Publication date Sep 11, 2014
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexibly Integrating Endpoint Logic Into Varied Platforms
- Publication number 20140052889
- Publication date Feb 20, 2014
- Michael Klinglesmith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC LINK WIDTH ADJUSTMENT
- Publication number 20140019654
- Publication date Jan 16, 2014
- Malay Trivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Providing Multiple Decode Options For A System-On-Chip (SoC) Fabric
- Publication number 20130086296
- Publication date Apr 4, 2013
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Aggregating Completion Messages In A Sideband Interface
- Publication number 20130083794
- Publication date Apr 4, 2013
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Common Idle State, Active State And Credit Management For An Interface
- Publication number 20130086139
- Publication date Apr 4, 2013
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Supporting Multiple Channels Of A Single Interface
- Publication number 20130086288
- Publication date Apr 4, 2013
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Issuing Requests To A Fabric
- Publication number 20130086586
- Publication date Apr 4, 2013
- Sridhar Lakshmanamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexibly Integrating Endpoint Logic Into Varied Platforms
- Publication number 20110131362
- Publication date Jun 2, 2011
- Michael Klinglesmith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexibly Integrating Endpoint Logic Into Varied Platforms
- Publication number 20110131456
- Publication date Jun 2, 2011
- Michael Klinglesmith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexibly Integrating Endpoint Logic Into Varied Platforms
- Publication number 20110080920
- Publication date Apr 7, 2011
- Michael Klinglesmith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexibly Integrating Endpoint Logic Into Varied Platforms
- Publication number 20100246594
- Publication date Sep 30, 2010
- Michael Klinglesmith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Serial signal ordering in serial general purpose input output (SGPIO)
- Publication number 20070079032
- Publication date Apr 5, 2007
- Intel Corporation
- Sailesh Bissessur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-function PCI device
- Publication number 20070073955
- Publication date Mar 29, 2007
- Joseph Murray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of preventing error propagation in a PCI / PCI-X / PCI expre...
- Publication number 20060271718
- Publication date Nov 30, 2006
- Bruno DiPlacido
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data integrity processing and protection techniques
- Publication number 20060136619
- Publication date Jun 22, 2006
- Intel Corporation
- Samantha Edirisooriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuit capable of memory access control
- Publication number 20060047934
- Publication date Mar 2, 2006
- Mark A. Schmisseur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for a multi-function direct memory access core
- Publication number 20050289253
- Publication date Dec 29, 2005
- Samantha J. Edirisooriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory reclamation
- Publication number 20040128464
- Publication date Jul 1, 2004
- Micheil J. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable memory bus width
- Publication number 20040128465
- Publication date Jul 1, 2004
- Micheil J. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Use of bus transaction identification codes
- Publication number 20030204662
- Publication date Oct 30, 2003
- Intel Corporation
- David Russell Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR REPEATING (EXTENDING) TRANSACTIONS ON A BU...
- Publication number 20020188794
- Publication date Dec 12, 2002
- LEE K. KOH
- G06 - COMPUTING CALCULATING COUNTING

Joseph Murray

Person

Patents Grantslast 30 patents

Systems and an apparatus with a sideband interface interconnecting...

Low-latency internode communication

Providing multiple decode options for a system-on-chip (SoC) fabric

Sideband parity handling

Supporting multiple channels of a single interface

Dynamic link width adjustment

Aggregating completion messages in a sideband interface

Common idle state, active state and credit management for an interface

Flexibly integrating endpoint logic into varied platforms

Issuing requests to a fabric

Issuing requests to a fabric

Flexibly integrating endpoint logic into varied platforms

Common idle state, active state and credit management for an interface

Issuing requests to a fabric

Aggregating completion messages in a sideband interface

Supporting multiple channels of a single interface

Providing multiple decode options for a system-on-chip (SoC) fabric

Flexibly integrating endpoint logic into varied platforms

Flexibly integrating endpoint logic into varied platforms

Flexibly integrating endpoint logic into varied platforms

Use of bus transaction identification codes

Phase lock loop system and method

Method and apparatus for repeating (extending) transactions on a bu...

Phase lock loop system and method

Data processor having integrated boolean and adder logic for accele...

Apparatus and method for pseudo-synchronous communication between c...

Low ICC enumeration scheme for bus powered USB device

Cache controller and method for dumping contents of a cache directo...

Method for performing writes of non-contiguous bytes on a PCI bus i...

Self-compensating output pad for an integrated circuit and method t...

Patents Applicationslast 30 patents

LOW-LATENCY INTERNODE COMMUNICATION

SIDEBAND PARITY HANDLING

AGGREGATING COMPLETION MESSAGES IN A SIDEBAND INTERFACE

Issuing Requests To A Fabric

Common Idle State, Active State And Credit Management For An Interface

Issuing Requests To A Fabric

Providing Multiple Decode Options For A System-On-Chip (SoC) Fabric

AGGREGATING COMPLETION MESSAGES IN A SIDEBAND INTERFACE

Supporting Multiple Channels Of A Single Interface

Flexibly Integrating Endpoint Logic Into Varied Platforms

DYNAMIC LINK WIDTH ADJUSTMENT

Providing Multiple Decode Options For A System-On-Chip (SoC) Fabric

Aggregating Completion Messages In A Sideband Interface

Common Idle State, Active State And Credit Management For An Interface

Supporting Multiple Channels Of A Single Interface

Issuing Requests To A Fabric

Flexibly Integrating Endpoint Logic Into Varied Platforms

Flexibly Integrating Endpoint Logic Into Varied Platforms

Flexibly Integrating Endpoint Logic Into Varied Platforms

Flexibly Integrating Endpoint Logic Into Varied Platforms

Serial signal ordering in serial general purpose input output (SGPIO)

Multi-function PCI device

Method of preventing error propagation in a PCI / PCI-X / PCI expre...

Data integrity processing and protection techniques

Integrated circuit capable of memory access control

Apparatus and method for a multi-function direct memory access core

Memory reclamation

Configurable memory bus width

Use of bus transaction identification codes

METHOD AND APPARATUS FOR REPEATING (EXTENDING) TRANSACTIONS ON A BU...