Joseph N. Babanezhad

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems, circuits and methods for dual transformer duplexing
- Patent number 8,811,599
- Issue date Aug 19, 2014
- NetLogic Microsystems, Inc.
- Joseph N. Babanezhad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Delay line correlator
- Patent number RE43790
- Issue date Nov 6, 2012
- NetLogic Microsystems, Inc.
- Joseph N. Babanezhad
- 375 - Pulse or digital communications
Information Patent Grant
Analog encoder based slicer
- Patent number 8,064,510
- Issue date Nov 22, 2011
- Netlogic Microsystems, Inc.
- Joseph N. Babanezhad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Joint phased training of equalizer and echo canceller
- Patent number 8,054,873
- Issue date Nov 8, 2011
- Netlogic Microsystems, Inc.
- Joseph N. Babanezhad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Least mean square (LMS) engine for multilevel signal
- Patent number 8,040,943
- Issue date Oct 18, 2011
- Netlogic Microsystems, Inc.
- Joseph N. Babanezhad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Delay line correlator
- Patent number 7,817,711
- Issue date Oct 19, 2010
- Plato Networks, Inc.
- Joseph N. Babanezhad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Analog adaptive line equalizer
- Patent number 6,169,764
- Issue date Jan 2, 2001
- Plato Labs, Inc.
- Joseph N. Babanezhad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digitally controlled tuner circuit
- Patent number 6,069,505
- Issue date May 30, 2000
- Plato Labs, Inc.
- Joseph N. Babanezhad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low voltage transmission line driver
- Patent number 6,028,479
- Issue date Feb 22, 2000
- Plato Labs, Inc.
- Joseph N. Babanezhad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
PLL-based differential tuner circuit
- Patent number 5,936,445
- Issue date Aug 10, 1999
- Plato Labs, Inc.
- Joseph N. Babanezhad
- G05 - CONTROLLING REGULATING
Information Patent Grant
Wide band-width operational amplifier
- Patent number 5,880,634
- Issue date Mar 9, 1999
- Plato Labs, Inc.
- Joseph N. Babanezhad
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Systems, Circuits and Methods for Dual Transformer Duplexing
- Publication number 20110019598
- Publication date Jan 27, 2011
- Joseph N. Babanezhad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Joint phased training of equalizer and echo canceller
- Publication number 20080224793
- Publication date Sep 18, 2008
- Joseph N. Babanezhad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Delay line correlator
- Publication number 20080122555
- Publication date May 29, 2008
- Joseph N. Babanezhad
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Joseph N. Babanezhad

Person

Patents Grantslast 30 patents

Systems, circuits and methods for dual transformer duplexing

Delay line correlator

Analog encoder based slicer

Joint phased training of equalizer and echo canceller

Least mean square (LMS) engine for multilevel signal

Delay line correlator

Analog adaptive line equalizer

Digitally controlled tuner circuit

Low voltage transmission line driver

PLL-based differential tuner circuit

Wide band-width operational amplifier

Patents Applicationslast 30 patents

Systems, Circuits and Methods for Dual Transformer Duplexing

Joint phased training of equalizer and echo canceller

Delay line correlator