Joseph William Heery JR.

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Tolland, CT, US

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Patents Grantslast 30 patents

Information Patent Grant
Method of fabricating a printed circuit board interconnect assembly
- Patent number 9,532,465
- Issue date Dec 27, 2016
- John Vesce
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
THREE-DIMENSIONAL CIRCUIT ASSEMBLY WITH COMPOSITE BONDED ENCAPSULATION
- Publication number 20210068250
- Publication date Mar 4, 2021
- John Vesce
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
PRINTED CIRCUIT BOARD INTERCONNECT ASSEMBLY AND METHOD
- Publication number 20130269183
- Publication date Oct 17, 2013
- John Vesce
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR