Josh B. Mastronarde

Person

Sacremento, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 12,198,221
- Issue date Jan 14, 2025
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling product SKUs based on chiplet configurations
- Patent number 12,141,890
- Issue date Nov 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of system-on-chip (SOC) architecture
- Patent number 12,112,398
- Issue date Oct 8, 2024
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of system-on-chip (SOC) architecture
- Patent number 12,056,789
- Issue date Aug 6, 2024
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically power on/off processing clusters during execution
- Patent number 11,989,076
- Issue date May 21, 2024
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 11,922,535
- Issue date Mar 5, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid low power homogenous grapics processing units
- Patent number 11,762,696
- Issue date Sep 19, 2023
- Intel Corporation
- Abhishek R Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of system-on-chip (SOC) architecture
- Patent number 11,763,416
- Issue date Sep 19, 2023
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of system-on-chip (SOC) architecture
- Patent number 11,756,150
- Issue date Sep 12, 2023
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 11,593,910
- Issue date Feb 28, 2023
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 11,562,461
- Issue date Jan 24, 2023
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Contextual configuration adjuster for graphics
- Patent number 11,494,868
- Issue date Nov 8, 2022
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for efficient graphics virtualization
- Patent number 11,475,623
- Issue date Oct 18, 2022
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive compute size per workload
- Patent number 11,416,962
- Issue date Aug 16, 2022
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of System-On-Chip (SOC) architecture
- Patent number 11,410,266
- Issue date Aug 9, 2022
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling product SKUS based on chiplet configurations
- Patent number 11,386,521
- Issue date Jul 12, 2022
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 11,348,198
- Issue date May 31, 2022
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 11,334,962
- Issue date May 17, 2022
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 11,222,392
- Issue date Jan 11, 2022
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid low power homogenous grapics processing units
- Patent number 11,169,850
- Issue date Nov 9, 2021
- Intel Corporation
- Abhishek R Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjusting graphics rendering based on facial expression
- Patent number 11,106,274
- Issue date Aug 31, 2021
- Intel Corporation
- Travis T. Schluessler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduce power by frame skipping
- Patent number 11,094,033
- Issue date Aug 17, 2021
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic voltage-frequency curve mangement
- Patent number 11,048,605
- Issue date Jun 29, 2021
- Intel Corporation
- Nikos Kaburlasos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive compute size per workload
- Patent number 10,963,986
- Issue date Mar 30, 2021
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Contextual configuration adjuster for graphics
- Patent number 10,929,947
- Issue date Feb 23, 2021
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling product SKUs based on chiplet configurations
- Patent number 10,909,652
- Issue date Feb 2, 2021
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute optimization mechanism for deep neural networks
- Patent number 10,902,547
- Issue date Jan 26, 2021
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for efficient graphics virtualization
- Patent number 10,891,773
- Issue date Jan 12, 2021
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregation of SOC architecture
- Patent number 10,803,548
- Issue date Oct 13, 2020
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduce power by frame skipping
- Patent number 10,565,671
- Issue date Feb 18, 2020
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DYNAMICALLY POWER ON/OFF PROCESSING CLUSTERS DURING EXECUTION
- Publication number 20240288927
- Publication date Aug 29, 2024
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS
- Publication number 20240257294
- Publication date Aug 1, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMESTAMP CORRELATED PERFORMANCE MONITORING ACROSS A GRAPHICS PROCE...
- Publication number 20240152178
- Publication date May 9, 2024
- Intel Corporation
- Prashant D. CHAUDHARI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BI-MODAL MEMORY IDLE HYSTERESIS FOR OPTIMAL ADD-IN CARD ACCELERATOR...
- Publication number 20240061582
- Publication date Feb 22, 2024
- Marc Beuchat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE
- Publication number 20240013338
- Publication date Jan 11, 2024
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE
- Publication number 20240005443
- Publication date Jan 4, 2024
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS
- Publication number 20240004713
- Publication date Jan 4, 2024
- Intel Corporation
- Abhishek R Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS
- Publication number 20230260072
- Publication date Aug 17, 2023
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS
- Publication number 20220335562
- Publication date Oct 20, 2022
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR EFFICIENT GRAPHICS VIRTUALIZATION
- Publication number 20220309731
- Publication date Sep 29, 2022
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS
- Publication number 20220206853
- Publication date Jun 30, 2022
- Intel Corporation
- Abhishek R Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS
- Publication number 20220188967
- Publication date Jun 16, 2022
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE
- Publication number 20220180468
- Publication date Jun 9, 2022
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS
- Publication number 20220156876
- Publication date May 19, 2022
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
- Publication number 20220122215
- Publication date Apr 21, 2022
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCE POWER BY FRAME SKIPPING
- Publication number 20220067874
- Publication date Mar 3, 2022
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTING GRAPHICS RENDERING BASED ON FACIAL EXPRESSION
- Publication number 20220050520
- Publication date Feb 17, 2022
- Intel Corporation
- Travis T. Schluessler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE
- Publication number 20220036500
- Publication date Feb 3, 2022
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS
- Publication number 20210350499
- Publication date Nov 11, 2021
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXTUAL CONFIGURATION ADJUSTER FOR GRAPHICS
- Publication number 20210312586
- Publication date Oct 7, 2021
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE COMPUTE SIZE PER WORKLOAD
- Publication number 20210287328
- Publication date Sep 16, 2021
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS
- Publication number 20210256654
- Publication date Aug 19, 2021
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS
- Publication number 20210241417
- Publication date Aug 5, 2021
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR EFFICIENT GRAPHICS VIRTUALIZATION
- Publication number 20210201556
- Publication date Jul 1, 2021
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SOC ARCHITECTURE
- Publication number 20210133913
- Publication date May 6, 2021
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISAGGREGATION OF SOC ARCHITECTURE
- Publication number 20200294181
- Publication date Sep 17, 2020
- Intel Corporation
- Naveen Matam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS
- Publication number 20200294180
- Publication date Sep 17, 2020
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCE POWER BY FRAME SKIPPING
- Publication number 20200250788
- Publication date Aug 6, 2020
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS
- Publication number 20200210238
- Publication date Jul 2, 2020
- Intel Corporation
- Abhishek R Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE COMPUTE SIZE PER WORKLOAD
- Publication number 20200202485
- Publication date Jun 25, 2020
- Intel Corporation
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING

Josh B. Mastronarde

Person

Patents Grantslast 30 patents

Compute optimization mechanism for deep neural networks

Enabling product SKUs based on chiplet configurations

Disaggregation of system-on-chip (SOC) architecture

Disaggregation of system-on-chip (SOC) architecture

Dynamically power on/off processing clusters during execution

Compute optimization mechanism for deep neural networks

Hybrid low power homogenous grapics processing units

Disaggregation of system-on-chip (SOC) architecture

Disaggregation of system-on-chip (SOC) architecture

Compute optimization mechanism for deep neural networks

Compute optimization mechanism for deep neural networks

Contextual configuration adjuster for graphics

Apparatus and method for efficient graphics virtualization

Adaptive compute size per workload

Disaggregation of System-On-Chip (SOC) architecture

Enabling product SKUS based on chiplet configurations

Compute optimization mechanism for deep neural networks

Compute optimization mechanism for deep neural networks

Compute optimization mechanism for deep neural networks

Hybrid low power homogenous grapics processing units

Adjusting graphics rendering based on facial expression

Reduce power by frame skipping

Dynamic voltage-frequency curve mangement

Adaptive compute size per workload

Contextual configuration adjuster for graphics

Enabling product SKUs based on chiplet configurations

Compute optimization mechanism for deep neural networks

Apparatus and method for efficient graphics virtualization

Disaggregation of SOC architecture

Reduce power by frame skipping

Patents Applicationslast 30 patents

DYNAMICALLY POWER ON/OFF PROCESSING CLUSTERS DURING EXECUTION

COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS

TIMESTAMP CORRELATED PERFORMANCE MONITORING ACROSS A GRAPHICS PROCE...

BI-MODAL MEMORY IDLE HYSTERESIS FOR OPTIMAL ADD-IN CARD ACCELERATOR...

DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE

DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE

HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS

COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS

COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS

APPARATUS AND METHOD FOR EFFICIENT GRAPHICS VIRTUALIZATION

HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS

ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS

DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE

COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

REDUCE POWER BY FRAME SKIPPING

ADJUSTING GRAPHICS RENDERING BASED ON FACIAL EXPRESSION

DISAGGREGATION OF SYSTEM-ON-CHIP (SOC) ARCHITECTURE

COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS

CONTEXTUAL CONFIGURATION ADJUSTER FOR GRAPHICS

ADAPTIVE COMPUTE SIZE PER WORKLOAD

ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS

COMPUTE OPTIMIZATION MECHANISM FOR DEEP NEURAL NETWORKS

APPARATUS AND METHOD FOR EFFICIENT GRAPHICS VIRTUALIZATION

DISAGGREGATION OF SOC ARCHITECTURE

DISAGGREGATION OF SOC ARCHITECTURE

ENABLING PRODUCT SKUS BASED ON CHIPLET CONFIGURATIONS

REDUCE POWER BY FRAME SKIPPING

HYBRID LOW POWER HOMOGENOUS GRAPICS PROCESSING UNITS

ADAPTIVE COMPUTE SIZE PER WORKLOAD