Josh BOWMAN

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Steering a history buffer entry to a specific recovery port during...
- Patent number 11,403,109
- Issue date Aug 2, 2022
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical register recovery within a processor
- Patent number 11,360,779
- Issue date Jun 14, 2022
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction streaming using state migration
- Patent number 11,301,254
- Issue date Apr 12, 2022
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fused overloaded register file read to enable 2-cycle move from con...
- Patent number 11,194,578
- Issue date Dec 7, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and handling of register data in processors
- Patent number 11,188,332
- Issue date Nov 30, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supporting speculative microprocessor instruction execution
- Patent number 11,144,364
- Issue date Oct 12, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register file write using pointers
- Patent number 11,093,282
- Issue date Aug 17, 2021
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High bandwidth logical register flush recovery
- Patent number 11,068,267
- Issue date Jul 20, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction streaming using copy select vector
- Patent number 11,061,681
- Issue date Jul 13, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and handling of register data in processors
- Patent number 10,956,158
- Issue date Mar 23, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical register recovery within a processor
- Patent number 10,949,213
- Issue date Mar 16, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementation of execution compression of instructions in slice ta...
- Patent number 10,949,205
- Issue date Mar 16, 2021
- International Business Machines Corporation
- Joshua Bowman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction chaining
- Patent number 10,936,321
- Issue date Mar 2, 2021
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Issue queue snooping for asynchronous flush and restore of distribu...
- Patent number 10,909,034
- Issue date Feb 2, 2021
- International Business Machines Corporation
- David R. Terry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flush-recovery bandwidth in a processor
- Patent number 10,740,140
- Issue date Aug 11, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing load-hit-store ha...
- Patent number 10,740,107
- Issue date Aug 11, 2020
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Merging status and control data in a reservation station
- Patent number 10,719,056
- Issue date Jul 21, 2020
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable latency pipe for interleaving instruction tags in a microp...
- Patent number 10,649,779
- Issue date May 12, 2020
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable latency pipe for interleaving instruction tags in a microp...
- Patent number 10,613,868
- Issue date Apr 7, 2020
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level history buffer for transaction memory in a microprocessor
- Patent number 10,545,765
- Issue date Jan 28, 2020
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-demand GPR ECC error detection and scrubbing for a multi-slice m...
- Patent number 10,489,253
- Issue date Nov 26, 2019
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Broadcasting messages between execution slices for issued instructi...
- Patent number 10,445,100
- Issue date Oct 15, 2019
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous flush and restore of distributed history buffer
- Patent number 10,379,867
- Issue date Aug 13, 2019
- International Business Machines Corporation
- David R. Terry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing dependency accumu...
- Patent number 10,318,294
- Issue date Jun 11, 2019
- International Business Machines Corporation
- Khandker N. Adeeb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Direct register restore mechanism for distributed history buffers
- Patent number 10,248,426
- Issue date Apr 2, 2019
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor with reduced flush and restore...
- Patent number 10,248,421
- Issue date Apr 2, 2019
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor with reduced flush and restore...
- Patent number 10,241,790
- Issue date Mar 26, 2019
- International Business Machines Corporation
- Salma Ayub
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative load data in byte-write capable register file and histo...
- Patent number 9,959,123
- Issue date May 1, 2018
- International Business Machines Corporation
- Joshua W. Bowman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining of validity of speculative load data after a predetermi...
- Patent number 9,928,073
- Issue date Mar 27, 2018
- International Business Machines Corporation
- Joshua W. Bowman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining of validity of speculative load data after a predetermi...
- Patent number 9,921,833
- Issue date Mar 20, 2018
- International Business Machines Corporation
- Joshua W. Bowman
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LOGICAL REGISTER RECOVERY WITHIN A PROCESSOR
- Publication number 20210089322
- Publication date Mar 25, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION STREAMING USING STATE MIGRATION
- Publication number 20210026642
- Publication date Jan 28, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION STREAMING USING COPY SELECT VECTOR
- Publication number 20210026643
- Publication date Jan 28, 2021
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND HANDLING OF REGISTER DATA IN PROCESSORS
- Publication number 20200356366
- Publication date Nov 12, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND HANDLING OF REGISTER DATA IN PROCESSORS
- Publication number 20200356369
- Publication date Nov 12, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH BANDWIDTH LOGICAL REGISTER FLUSH RECOVERY
- Publication number 20200341767
- Publication date Oct 29, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REGISTER FILE WRITE USING POINTERS
- Publication number 20200326978
- Publication date Oct 15, 2020
- International Business Machines Corporation
- Brian D. Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION CHAINING
- Publication number 20200249954
- Publication date Aug 6, 2020
- International Business Machines Corporation
- Kurt A. Feiste
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPORTING SPECULATIVE MICROPROCESSOR INSTRUCTION EXECUTION
- Publication number 20200241931
- Publication date Jul 30, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTATION OF EXECUTION COMPRESSION OF INSTRUCTIONS IN SLICE TA...
- Publication number 20200201639
- Publication date Jun 25, 2020
- International Business Machines Corporation
- Joshua Bowman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECULATIVE FLUSH RECOVERY LOOKUP IN A PROCESSOR
- Publication number 20200183701
- Publication date Jun 11, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGICAL REGISTER RECOVERY WITHIN A PROCESSOR
- Publication number 20200183700
- Publication date Jun 11, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLUSH-RECOVERY BANDWIDTH IN A PROCESSOR
- Publication number 20200159564
- Publication date May 21, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple Level History Buffer for Transaction Memory Support
- Publication number 20200019405
- Publication date Jan 16, 2020
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fused Overloaded Register File Read to Enable 2-Cycle Move from Con...
- Publication number 20190361698
- Publication date Nov 28, 2019
- International Business Machines Corporation
- Steven J. Battle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ISSUE QUEUE SNOOPING FOR ASYNCHRONOUS FLUSH AND RESTORE OF DISTRIBU...
- Publication number 20190188133
- Publication date Jun 20, 2019
- International Business Machines Corporation
- David R. TERRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS FLUSH AND RESTORE OF DISTRIBUTED HISTORY BUFFER
- Publication number 20190187995
- Publication date Jun 20, 2019
- International Business Machines Corporation
- David R. TERRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-DEMAND GPR ECC ERROR DETECTION AND SCRUBBING FOR A MULTI-SLICE M...
- Publication number 20180336108
- Publication date Nov 22, 2018
- International Business Machines Corporation
- Steven J. BATTLE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL HISTORY BUFFER FOR TRANSACTION MEMORY IN A MICROPROCESSOR
- Publication number 20180336037
- Publication date Nov 22, 2018
- International Business Machines Corporation
- Brian D. BARRICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING PRIORITIZED DEPEN...
- Publication number 20180004527
- Publication date Jan 4, 2018
- International Business Machines Corporation
- KHANDKER N. ADEEB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING DEPENDENCY ACCUMU...
- Publication number 20170364358
- Publication date Dec 21, 2017
- International Business Machines Corporation
- KHANDKER N. ADEEB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSMITTING DATA BETWEEN EXECUTION SLICES OF A MULTI-SLICE PROCESSOR
- Publication number 20170357513
- Publication date Dec 14, 2017
- International Business Machines Corporation
- SALMA AYUB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING LOAD-HIT-STORE HA...
- Publication number 20170351522
- Publication date Dec 7, 2017
- International Business Machines Corporation
- SALMA AYUB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECT REGISTER RESTORE MECHANISM FOR DISTRIBUTED HISTORY BUFFERS
- Publication number 20170344380
- Publication date Nov 30, 2017
- International Business Machines Corporation
- Brian D. BARRICK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MERGING STATUS AND CONTROL DATA IN A RESERVATION STATION
- Publication number 20170315528
- Publication date Nov 2, 2017
- International Business Machines Corporation
- Brian Barrick
- G05 - CONTROLLING REGULATING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR WITH SPECULATIVE DATA LOADING
- Publication number 20170168836
- Publication date Jun 15, 2017
- International Business Machines Corporation
- JOSHUA W. BOWMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR WITH REDUCED FLUSH AND RESTORE...
- Publication number 20170168818
- Publication date Jun 15, 2017
- International Business Machines Corporation
- Salma AYUB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR WITH SPECULATIVE DATA LOADING
- Publication number 20170168821
- Publication date Jun 15, 2017
- International Business Machines Corporation
- JOSHUA W. BOWMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR WITH REDUCED FLUSH AND RESTORE...
- Publication number 20170168826
- Publication date Jun 15, 2017
- International Business Machines Corporation
- Salma AYUB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARITY PROTECTION OF A REGISTER
- Publication number 20170060673
- Publication date Mar 2, 2017
- International Business Machines Corporation
- Joshua W. Bowman
- G06 - COMPUTING CALCULATING COUNTING

Josh BOWMAN

Person

Patents Grantslast 30 patents

Steering a history buffer entry to a specific recovery port during...

Logical register recovery within a processor

Instruction streaming using state migration

Fused overloaded register file read to enable 2-cycle move from con...

System and handling of register data in processors

Supporting speculative microprocessor instruction execution

Register file write using pointers

High bandwidth logical register flush recovery

Instruction streaming using copy select vector

System and handling of register data in processors

Logical register recovery within a processor

Implementation of execution compression of instructions in slice ta...

Instruction chaining

Issue queue snooping for asynchronous flush and restore of distribu...

Flush-recovery bandwidth in a processor

Operation of a multi-slice processor implementing load-hit-store ha...

Merging status and control data in a reservation station

Variable latency pipe for interleaving instruction tags in a microp...

Variable latency pipe for interleaving instruction tags in a microp...

Multi-level history buffer for transaction memory in a microprocessor

On-demand GPR ECC error detection and scrubbing for a multi-slice m...

Broadcasting messages between execution slices for issued instructi...

Asynchronous flush and restore of distributed history buffer

Operation of a multi-slice processor implementing dependency accumu...

Direct register restore mechanism for distributed history buffers

Operation of a multi-slice processor with reduced flush and restore...

Operation of a multi-slice processor with reduced flush and restore...

Speculative load data in byte-write capable register file and histo...

Determining of validity of speculative load data after a predetermi...

Determining of validity of speculative load data after a predetermi...

Patents Applicationslast 30 patents

LOGICAL REGISTER RECOVERY WITHIN A PROCESSOR

INSTRUCTION STREAMING USING STATE MIGRATION

INSTRUCTION STREAMING USING COPY SELECT VECTOR

SYSTEM AND HANDLING OF REGISTER DATA IN PROCESSORS

SYSTEM AND HANDLING OF REGISTER DATA IN PROCESSORS

HIGH BANDWIDTH LOGICAL REGISTER FLUSH RECOVERY

REGISTER FILE WRITE USING POINTERS

INSTRUCTION CHAINING

SUPPORTING SPECULATIVE MICROPROCESSOR INSTRUCTION EXECUTION

IMPLEMENTATION OF EXECUTION COMPRESSION OF INSTRUCTIONS IN SLICE TA...

SPECULATIVE FLUSH RECOVERY LOOKUP IN A PROCESSOR

LOGICAL REGISTER RECOVERY WITHIN A PROCESSOR

FLUSH-RECOVERY BANDWIDTH IN A PROCESSOR

Multiple Level History Buffer for Transaction Memory Support

Fused Overloaded Register File Read to Enable 2-Cycle Move from Con...

ISSUE QUEUE SNOOPING FOR ASYNCHRONOUS FLUSH AND RESTORE OF DISTRIBU...

ASYNCHRONOUS FLUSH AND RESTORE OF DISTRIBUTED HISTORY BUFFER

ON-DEMAND GPR ECC ERROR DETECTION AND SCRUBBING FOR A MULTI-SLICE M...

MULTI-LEVEL HISTORY BUFFER FOR TRANSACTION MEMORY IN A MICROPROCESSOR

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING PRIORITIZED DEPEN...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING DEPENDENCY ACCUMU...

TRANSMITTING DATA BETWEEN EXECUTION SLICES OF A MULTI-SLICE PROCESSOR

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING LOAD-HIT-STORE HA...

DIRECT REGISTER RESTORE MECHANISM FOR DISTRIBUTED HISTORY BUFFERS

MERGING STATUS AND CONTROL DATA IN A RESERVATION STATION

OPERATION OF A MULTI-SLICE PROCESSOR WITH SPECULATIVE DATA LOADING

OPERATION OF A MULTI-SLICE PROCESSOR WITH REDUCED FLUSH AND RESTORE...

OPERATION OF A MULTI-SLICE PROCESSOR WITH SPECULATIVE DATA LOADING

OPERATION OF A MULTI-SLICE PROCESSOR WITH REDUCED FLUSH AND RESTORE...

PARITY PROTECTION OF A REGISTER