Joung-Wei Liou

Person

Jhudong Township, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Magnetic tunnel junction device and method of forming same
- Patent number 12,154,608
- Issue date Nov 26, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Bo-Jhih Shen
- G11 - INFORMATION STORAGE
Information Patent Grant
Hardened interlayer dielectric layer
- Patent number 12,087,692
- Issue date Sep 10, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect system with improved low-K dielectrics
- Patent number 12,080,547
- Issue date Sep 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Magnetic tunnel junction device and method of forming same
- Patent number 11,990,167
- Issue date May 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Bo-Jhih Shen
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor structure having high breakdown voltage etch-stop layer
- Patent number 11,961,803
- Issue date Apr 16, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Spacer scheme and method for MRAM
- Patent number 11,818,964
- Issue date Nov 14, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
Information Patent Grant
Methods for forming a spacer stack for magnetic tunnel junctions
- Patent number 11,785,858
- Issue date Oct 10, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Joung-Wei Liou
Information Patent Grant
High breakdown voltage inter-metal dielectric layer
- Patent number 11,769,692
- Issue date Sep 26, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interlayer dielectric layer
- Patent number 11,749,563
- Issue date Sep 5, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photoresist and method of formation and use
- Patent number 11,650,500
- Issue date May 16, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Keng-Chu Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer mask and method of forming same
- Patent number 11,488,825
- Issue date Nov 1, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Spacer scheme and method for MRAM
- Patent number 11,283,005
- Issue date Mar 22, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer structure having a dense middle layer
- Patent number 11,139,200
- Issue date Oct 5, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Magnetic tunnel junction device and method of forming same
- Patent number 11,043,251
- Issue date Jun 22, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Bo-Jhih Shen
- G01 - MEASURING TESTING
Information Patent Grant
Interconnect system with improved low-k dielectrics
- Patent number 11,043,373
- Issue date Jun 22, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall spacer stack for magnetic tunnel junctions
- Patent number 10,879,456
- Issue date Dec 29, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Photoresist and method of formation and use
- Patent number 10,761,427
- Issue date Sep 1, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Keng-Chu Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer mask and method of forming same
- Patent number 10,748,765
- Issue date Aug 18, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process chamber and wafer processing method
- Patent number 10,741,366
- Issue date Aug 11, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chien Kuo Huang
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Multi-layer structure having a dense middle layer
- Patent number 10,510,586
- Issue date Dec 17, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Support structure for barrier layer of semiconductor device
- Patent number 10,181,443
- Issue date Jan 15, 2019
- Taiwan Semiconductor Manufacturing Company Limited
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low-K dielectric layer and porogen
- Patent number 10,134,632
- Issue date Nov 20, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Gas diffuser unit, process chamber and wafer processing method
- Patent number 10,008,367
- Issue date Jun 26, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chien Kuo Huang
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Semiconductor devices, methods of manufacture thereof, and inter-me...
- Patent number 9,941,214
- Issue date Apr 10, 2018
- Taiwan Semiconductor Manufacturing Company
- Yu-Yun Peng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back-end-of-line (BEOL) interconnect structure
- Patent number 9,870,944
- Issue date Jan 16, 2018
- Taiwan Semiconductor Manufacturing Company Limited
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices including conductive features with capping la...
- Patent number 9,812,390
- Issue date Nov 7, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hui-Chun Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive structure in semiconductor structure and method for form...
- Patent number 9,748,175
- Issue date Aug 29, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd
- Yi-Jung Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making interconnect structure
- Patent number 9,748,134
- Issue date Aug 29, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Po-Cheng Shih
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low-K dielectric layer and porogen
- Patent number 9,564,383
- Issue date Feb 7, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density dielectric etch-stop layer
- Patent number 9,379,061
- Issue date Jun 28, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SPACER SCHEME AND METHOD FOR MRAM
- Publication number 20240381784
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
Information Patent Application
INTERCONNECT SYSTEM WITH IMPROVED LOW-K DIELECTRICS
- Publication number 20240363336
- Publication date Oct 31, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Structure Having High Breakdown Voltage Etch-Stop Layer
- Publication number 20240266292
- Publication date Aug 8, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPACER SCHEME AND METHOD FOR MRAM
- Publication number 20240122077
- Publication date Apr 11, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
Information Patent Application
Magnetic Tunnel Junction Device and Method of Forming Same
- Publication number 20240021230
- Publication date Jan 18, 2024
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Bo-Jhih Shen
- G11 - INFORMATION STORAGE
Information Patent Application
Spacer Stack For Magnetic Tunnel Junctions
- Publication number 20230413680
- Publication date Dec 21, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei Liou
Information Patent Application
INTERLAYER DIELECTRIC LAYER
- Publication number 20230369106
- Publication date Nov 16, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH BREAKDOWN VOLTAGE ETCH-STOP LAYER
- Publication number 20230008675
- Publication date Jan 12, 2023
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HARDENED INTERLAYER DIELECTRIC LAYER
- Publication number 20220367380
- Publication date Nov 17, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei LIOU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPACER SCHEME AND METHOD FOR MRAM
- Publication number 20220209101
- Publication date Jun 30, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MAGNETIC TUNNEL JUNCTION DEVICE AND METHOD OF FORMING SAME
- Publication number 20210312965
- Publication date Oct 7, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Bo-Jhih Shen
- G11 - INFORMATION STORAGE
Information Patent Application
Interconnect System with Improved Low-K Dielectrics
- Publication number 20210313174
- Publication date Oct 7, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPACER STACK FOR MAGNETIC TUNNEL JUNCTIONS
- Publication number 20210119116
- Publication date Apr 22, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPACER SCHEME AND METHOD FOR MRAM
- Publication number 20210098685
- Publication date Apr 1, 2021
- Taiwan Semiconductor Manufacturing Co., LTD
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Photoresist and Method of Formation and Use
- Publication number 20200393763
- Publication date Dec 17, 2020
- Taiwan Semiconductor Manfacturing Co., Ltd.
- Keng-Chu Lin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
MULTI-LAYER MASK AND METHOD OF FORMING SAME
- Publication number 20200381252
- Publication date Dec 3, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER PROCESSING METHOD
- Publication number 20200357612
- Publication date Nov 12, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien Kuo HUANG
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Multi-Layer Mask and Method of Forming Same
- Publication number 20200176253
- Publication date Jun 4, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MAGNETIC TUNNEL JUNCTION DEVICE AND METHOD OF FORMING SAME
- Publication number 20200176041
- Publication date Jun 4, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Bo-Jhih Shen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH BREAKDOWN VOLTAGE INTER-METAL DIELECTRIC LAYER
- Publication number 20200135552
- Publication date Apr 30, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-Layer Structure Having a Dense Middle Layer
- Publication number 20200111703
- Publication date Apr 9, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT SYSTEM WITH IMPROVED LOW-K DIELECTRICS
- Publication number 20200043721
- Publication date Feb 6, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERLAYER DIELECTRIC LAYER
- Publication number 20200006126
- Publication date Jan 2, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPACER STACK FOR MAGNETIC TUNNEL JUNCTIONS
- Publication number 20200006641
- Publication date Jan 2, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HARDENED INTERLAYER DIELECTRIC LAYER
- Publication number 20190096820
- Publication date Mar 28, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Joung-Wei LIOU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROCESS CHAMBER AND WAFER PROCESSING METHOD
- Publication number 20180308665
- Publication date Oct 25, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien Kuo HUANG
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
Low-K Dielectric Layer and Porogen
- Publication number 20170148676
- Publication date May 25, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Devices Including Conductive Features with Capping La...
- Publication number 20160260667
- Publication date Sep 8, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hui-Chun Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Photoresist and Method of Formation and Use
- Publication number 20160259246
- Publication date Sep 8, 2016
- Taiwan Semiconductor Manufaturing Company, Ltd.
- Keng-Chu Lin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
SUPPORT STRUCTURE FOR BARRIER LAYER OF SEMICONDUCTOR DEVICE
- Publication number 20160197043
- Publication date Jul 7, 2016
- Taiwan Semiconductor Manufacturing Company Limited
- Joung-Wei Liou
- H01 - BASIC ELECTRIC ELEMENTS

Joung-Wei Liou

Person

Patents Grantslast 30 patents

Magnetic tunnel junction device and method of forming same

Hardened interlayer dielectric layer

Interconnect system with improved low-K dielectrics

Magnetic tunnel junction device and method of forming same

Semiconductor structure having high breakdown voltage etch-stop layer

Spacer scheme and method for MRAM

Methods for forming a spacer stack for magnetic tunnel junctions

High breakdown voltage inter-metal dielectric layer

Interlayer dielectric layer

Photoresist and method of formation and use

Multi-layer mask and method of forming same

Spacer scheme and method for MRAM

Multi-layer structure having a dense middle layer

Magnetic tunnel junction device and method of forming same

Interconnect system with improved low-k dielectrics

Sidewall spacer stack for magnetic tunnel junctions

Photoresist and method of formation and use

Multi-layer mask and method of forming same

Process chamber and wafer processing method

Multi-layer structure having a dense middle layer

Support structure for barrier layer of semiconductor device

Low-K dielectric layer and porogen

Gas diffuser unit, process chamber and wafer processing method

Semiconductor devices, methods of manufacture thereof, and inter-me...

Back-end-of-line (BEOL) interconnect structure

Semiconductor devices including conductive features with capping la...

Conductive structure in semiconductor structure and method for form...

Method of making interconnect structure

Low-K dielectric layer and porogen

High density dielectric etch-stop layer

Patents Applicationslast 30 patents

SPACER SCHEME AND METHOD FOR MRAM

INTERCONNECT SYSTEM WITH IMPROVED LOW-K DIELECTRICS

Semiconductor Structure Having High Breakdown Voltage Etch-Stop Layer

SPACER SCHEME AND METHOD FOR MRAM

Magnetic Tunnel Junction Device and Method of Forming Same

Spacer Stack For Magnetic Tunnel Junctions

INTERLAYER DIELECTRIC LAYER

HIGH BREAKDOWN VOLTAGE ETCH-STOP LAYER

HARDENED INTERLAYER DIELECTRIC LAYER

SPACER SCHEME AND METHOD FOR MRAM

MAGNETIC TUNNEL JUNCTION DEVICE AND METHOD OF FORMING SAME

Interconnect System with Improved Low-K Dielectrics

SPACER STACK FOR MAGNETIC TUNNEL JUNCTIONS

SPACER SCHEME AND METHOD FOR MRAM

Photoresist and Method of Formation and Use

MULTI-LAYER MASK AND METHOD OF FORMING SAME

WAFER PROCESSING METHOD

Multi-Layer Mask and Method of Forming Same

MAGNETIC TUNNEL JUNCTION DEVICE AND METHOD OF FORMING SAME

HIGH BREAKDOWN VOLTAGE INTER-METAL DIELECTRIC LAYER

Multi-Layer Structure Having a Dense Middle Layer

INTERCONNECT SYSTEM WITH IMPROVED LOW-K DIELECTRICS

INTERLAYER DIELECTRIC LAYER

SPACER STACK FOR MAGNETIC TUNNEL JUNCTIONS

HARDENED INTERLAYER DIELECTRIC LAYER

PROCESS CHAMBER AND WAFER PROCESSING METHOD

Low-K Dielectric Layer and Porogen

Semiconductor Devices Including Conductive Features with Capping La...

Photoresist and Method of Formation and Use

SUPPORT STRUCTURE FOR BARRIER LAYER OF SEMICONDUCTOR DEVICE