Juan J. Noguera Serra

Follow

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multiple partitions in a data processing array
- Patent number 11,848,670
- Issue date Dec 19, 2023
- Xilinx, Inc.
- Juan J. Noguera Serra
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-addressing mode for DMA and non-sequential read and write pat...
- Patent number 11,669,464
- Issue date Jun 6, 2023
- Xilinx, Inc.
- Goran Hk Bilski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory tiles in data processing engine array
- Patent number 11,520,717
- Issue date Dec 6, 2022
- Xilinx, Inc.
- David Clarke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing engines with cascade connected cores
- Patent number 11,443,091
- Issue date Sep 13, 2022
- Xilinx, Inc.
- Peter McColgan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable device having a data processing engine (DPE) array
- Patent number 11,386,020
- Issue date Jul 12, 2022
- Xilinx, Inc.
- Matthew H. Klein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-port stream switch for stream interconnect network
- Patent number 11,323,391
- Issue date May 3, 2022
- Xilinx, Inc.
- Peter McColgan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLE PARTITIONS IN A DATA PROCESSING ARRAY
- Publication number 20240088900
- Publication date Mar 14, 2024
- Xilinx, Inc.
- Juan J. Noguera Serra
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE PARTITIONS IN A DATA PROCESSING ARRAY
- Publication number 20230336179
- Publication date Oct 19, 2023
- Xilinx, Inc.
- Juan J. Noguera Serra
- G11 - INFORMATION STORAGE