Judy M. Gehman

Person

Ft. Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Cache system for managing various cache line conditions
- Patent number 9,235,521
- Issue date Jan 12, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Gary M. Lippert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit to efficiently handle data movement within a cache controll...
- Patent number 8,510,493
- Issue date Aug 13, 2013
- LSI Corporation
- Judy M Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing cache line allocations for multiple issue processors
- Patent number 8,095,734
- Issue date Jan 10, 2012
- LSI Corporation
- Gary Lippert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for estimation of trace information bandwidth requirements
- Patent number 7,949,986
- Issue date May 24, 2011
- LSI Corporation
- Judy Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for implementing multiple instantiated configurab...
- Patent number 7,620,743
- Issue date Nov 17, 2009
- LSI Corporation
- Judy M. Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process and apparatus for abstracting IC design files
- Patent number 7,584,460
- Issue date Sep 1, 2009
- LSI Corporation
- Robert N. C. Broberg, III
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for request transaction ordering in OCP bus to AXI bus bridg...
- Patent number 7,457,905
- Issue date Nov 25, 2008
- LSI Corporation
- Judy Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heterogeneous multi-processor reference design
- Patent number 7,000,092
- Issue date Feb 14, 2006
- LSI Logic Corporation
- Judy Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Grant removal via dummy master arbitration
- Patent number 6,785,755
- Issue date Aug 31, 2004
- LSI Logic Corporation
- Jeffrey J. Holm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic deadlock prevention via arbitration switching
- Patent number 6,745,273
- Issue date Jun 1, 2004
- LSI Logic Corporation
- Judy M. Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Direct attach of interrupt controller to processor module
- Patent number 6,496,517
- Issue date Dec 17, 2002
- LSI Logic Corporation
- Judy M. Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for arbitrating access to multiple buses in a...
- Patent number 6,260,093
- Issue date Jul 10, 2001
- LSI Logic Corporation
- Judy M. Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for coordinating competing register accesses by m...
- Patent number 6,115,770
- Issue date Sep 5, 2000
- LSI Logic Corporation
- Judy M. Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Priority arbiter with shifting sequential priority scheme
- Patent number 6,073,132
- Issue date Jun 6, 2000
- LSI Logic Corporation
- Judy M. Gehman
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CACHE SYSTEM FOR MANAGING VARIOUS CACHE LINE CONDITIONS
- Publication number 20150026411
- Publication date Jan 22, 2015
- LSI Corporation
- Gary M. Lippert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT TO EFFICIENTLY HANDLE DATA MOVEMENT WITHIN A CACHE CONTROLL...
- Publication number 20120166730
- Publication date Jun 28, 2012
- LSI Corporation
- Judy M. Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING CACHE LINE ALLOCATIONS FOR MULTIPLE ISSUE PROCESSORS
- Publication number 20100281219
- Publication date Nov 4, 2010
- Gary Lippert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR ESTIMATION OF TRACE INFORMATION BANDWIDTH REQUIREMENTS
- Publication number 20090319963
- Publication date Dec 24, 2009
- LSI Corporation
- Judy Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Endian mapping engine, method of endian mapping and a processing sy...
- Publication number 20070150627
- Publication date Jun 28, 2007
- LSI Logic Corporation
- Judy M. Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for request transaction ordering in OCP bus to AXI bus bridg...
- Publication number 20070067549
- Publication date Mar 22, 2007
- Judy Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for implementing multiple instantiated configurab...
- Publication number 20050223388
- Publication date Oct 6, 2005
- LSI Logic Corporation
- Judy M. Gehman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Process and apparatus for abstracting IC design files
- Publication number 20050022155
- Publication date Jan 27, 2005
- LSI Logic Corporation
- Robert N.C. Broberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Heterogeneous multi-processor reference design
- Publication number 20040117743
- Publication date Jun 17, 2004
- Judy Gehman
- G06 - COMPUTING CALCULATING COUNTING

Judy M. Gehman

Person

Patents Grantslast 30 patents

Cache system for managing various cache line conditions

Circuit to efficiently handle data movement within a cache controll...

Managing cache line allocations for multiple issue processors

Method for estimation of trace information bandwidth requirements

System and method for implementing multiple instantiated configurab...

Process and apparatus for abstracting IC design files

Method for request transaction ordering in OCP bus to AXI bus bridg...

Heterogeneous multi-processor reference design

Grant removal via dummy master arbitration

Automatic deadlock prevention via arbitration switching

Direct attach of interrupt controller to processor module

Method and apparatus for arbitrating access to multiple buses in a...

System and method for coordinating competing register accesses by m...

Priority arbiter with shifting sequential priority scheme

Patents Applicationslast 30 patents

CACHE SYSTEM FOR MANAGING VARIOUS CACHE LINE CONDITIONS

CIRCUIT TO EFFICIENTLY HANDLE DATA MOVEMENT WITHIN A CACHE CONTROLL...

MANAGING CACHE LINE ALLOCATIONS FOR MULTIPLE ISSUE PROCESSORS

METHOD FOR ESTIMATION OF TRACE INFORMATION BANDWIDTH REQUIREMENTS

Endian mapping engine, method of endian mapping and a processing sy...

Method for request transaction ordering in OCP bus to AXI bus bridg...

System and method for implementing multiple instantiated configurab...

Process and apparatus for abstracting IC design files

Heterogeneous multi-processor reference design