Juergen Boemmels

Person

Heverlee, BE

People

Patents Grantslast 30 patents

Information Patent Grant
Method for forming transistor structures
- Patent number 11,682,591
- Issue date Jun 20, 2023
- Imec VZW
- Boon Teik Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D integrated count
- Patent number 11,677,401
- Issue date Jun 13, 2023
- Imec VZW
- Francky Catthoor
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned contacts for walled nanosheet and forksheet field effe...
- Patent number 11,515,399
- Issue date Nov 29, 2022
- Imec VZW
- Eugenio Dentoni Litta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned layer patterning
- Patent number 11,488,826
- Issue date Nov 1, 2022
- Imec VZW
- Boon Teik Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned contacts for nanosheet field effect transistor devices
- Patent number 11,462,443
- Issue date Oct 4, 2022
- Imec VZW
- Eugenio Dentoni Litta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D integrated circuit
- Patent number 11,381,242
- Issue date Jul 5, 2022
- Imec VZW
- Francky Catthoor
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Standard cell device and method of forming an interconnect structur...
- Patent number 11,295,977
- Issue date Apr 5, 2022
- Imec VZW
- Juergen Boemmels
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device having vertical transistors and method of form...
- Patent number 11,257,823
- Issue date Feb 22, 2022
- Imec VZW
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having stacked transistor pairs and method of...
- Patent number 11,244,949
- Issue date Feb 8, 2022
- Imec VZW
- Pieter Weckx
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for forming an interconnection structure
- Patent number 11,127,627
- Issue date Sep 21, 2021
- Imec VZW
- Frederic Lazzarino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned gate contact
- Patent number 10,847,415
- Issue date Nov 24, 2020
- Imec VZW
- Julien Ryckaert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method
- Patent number 10,833,161
- Issue date Nov 10, 2020
- Imec VZW
- Syed Muhammad Yasser Sherazi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a multi-level interconnect structure
- Patent number 10,763,159
- Issue date Sep 1, 2020
- Imec VZW
- Basoene Briggs
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional semiconductor device and method of manufacturing...
- Patent number 10,748,815
- Issue date Aug 18, 2020
- Imec VZW
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming vertical channel devices
- Patent number 10,566,236
- Issue date Feb 18, 2020
- Imec VZW
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming vertical channel devices
- Patent number 10,546,930
- Issue date Jan 28, 2020
- Imec VZW
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of patterning target layer
- Patent number 10,395,978
- Issue date Aug 27, 2019
- Imec VZW
- Basoene Briggs
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical channel devices and method of fabricating same
- Patent number 10,374,084
- Issue date Aug 6, 2019
- Imec VZW
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for interrupting a line in an interconnect
- Patent number 10,242,907
- Issue date Mar 26, 2019
- Imec VZW
- Julien Ryckaert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned interconnects
- Patent number 9,859,161
- Issue date Jan 2, 2018
- Imec VZW
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Method for Producing Nanosheet Transistors
- Publication number 20250212504
- Publication date Jun 26, 2025
- IMEC vzw
- Geert Hellings
Information Patent Application
Method for Forming a Semiconductor Structure
- Publication number 20250212494
- Publication date Jun 26, 2025
- IMEC vzw
- Serge Biesemans
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CFET CELL ARCHITECTURE WITH A SIDE-ROUTING STRUCTURE
- Publication number 20240266349
- Publication date Aug 8, 2024
- IMEC vzw
- Gioele Mirabelli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Forming a Stacked FET Device
- Publication number 20230197726
- Publication date Jun 22, 2023
- IMEC vzw
- Book Teik Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Forming a Semiconductor Device Structure
- Publication number 20230197525
- Publication date Jun 22, 2023
- IMEC vzw
- Basoene Briggs
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D INTEGRATED COUNT
- Publication number 20220271755
- Publication date Aug 25, 2022
- IMEC vzw
- Francky CATTHOOR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D INTEGRATED CIRCUIT
- Publication number 20220109447
- Publication date Apr 7, 2022
- IMEC vzw
- Francky CATTHOOR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING TRANSISTOR STRUCTURES
- Publication number 20220068725
- Publication date Mar 3, 2022
- IMEC vzw
- Boon Teik Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED CONTACTS FOR WALLED NANOSHEET AND FORKSHEET FIELD EFFE...
- Publication number 20210193821
- Publication date Jun 24, 2021
- IMEC vzw
- Eugenio Dentoni Litta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED CONTACTS FOR NANOSHEET FIELD EFFECT TRANSISTOR DEVICES
- Publication number 20210183711
- Publication date Jun 17, 2021
- IMEC vzw
- Eugenio Dentoni Litta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED LAYER PATTERNING
- Publication number 20210020516
- Publication date Jan 21, 2021
- IMEC vzw
- Boon Teik Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STANDARD CELL DEVICE AND METHOD OF FORMING AN INTERCONNECT STRUCTUR...
- Publication number 20200328109
- Publication date Oct 15, 2020
- IMEC vzw
- Juergen Boemmels
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR FORMING AN INTERCONNECTION STRUCTURE
- Publication number 20200168500
- Publication date May 28, 2020
- IMEC vzw
- Frederic Lazzarino
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING...
- Publication number 20200135568
- Publication date Apr 30, 2020
- IMEC vzw
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FORMING A MULTI-LEVEL INTERCONNECT STRUCTURE
- Publication number 20200027780
- Publication date Jan 23, 2020
- IMEC vzw
- Basoene Briggs
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE AND METHOD OF FORMING SEMICONDUCTOR DEVICE
- Publication number 20190386011
- Publication date Dec 19, 2019
- IMEC vzw
- Pieter Weckx
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device and Method
- Publication number 20190229196
- Publication date Jul 25, 2019
- IMEC vzw
- Syed Muhammad Yasser Sherazi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING VERTICAL TRANSISTORS AND METHOD OF FORM...
- Publication number 20190035795
- Publication date Jan 31, 2019
- IMEC vzw
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING VERTICAL CHANNEL DEVICES
- Publication number 20180342584
- Publication date Nov 29, 2018
- IMEC vzw
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL CHANNEL DEVICES AND METHOD OF FABRICATING SAME
- Publication number 20180342616
- Publication date Nov 29, 2018
- IMEC vzw
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING VERTICAL CHANNEL DEVICES
- Publication number 20180330988
- Publication date Nov 15, 2018
- IMEC vzw
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF PATTERNING TARGET LAYER
- Publication number 20180247863
- Publication date Aug 30, 2018
- IMEC vzw
- Basoene Briggs
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR INTERRUPTING A LINE IN AN INTERCONNECT
- Publication number 20170352587
- Publication date Dec 7, 2017
- IMECVZW
- Julien Ryckaert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED GATE CONTACT
- Publication number 20170278752
- Publication date Sep 28, 2017
- IMEC vzw
- Julien Ryckaert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED INTERCONNECTS
- Publication number 20170256451
- Publication date Sep 7, 2017
- IMEC vzw
- Juergen Boemmels
- H01 - BASIC ELECTRIC ELEMENTS

Juergen Boemmels

Person

Patents Grantslast 30 patents

Method for forming transistor structures

3D integrated count

Self-aligned contacts for walled nanosheet and forksheet field effe...

Self-aligned layer patterning

Self-aligned contacts for nanosheet field effect transistor devices

3D integrated circuit

Standard cell device and method of forming an interconnect structur...

Semiconductor device having vertical transistors and method of form...

Semiconductor device having stacked transistor pairs and method of...

Method for forming an interconnection structure

Self-aligned gate contact

Semiconductor device and method

Method for forming a multi-level interconnect structure

Three-dimensional semiconductor device and method of manufacturing...

Method of forming vertical channel devices

Method of forming vertical channel devices

Method of patterning target layer

Vertical channel devices and method of fabricating same

Method for interrupting a line in an interconnect

Self-aligned interconnects

Patents Applicationslast 30 patents

Method for Producing Nanosheet Transistors

Method for Forming a Semiconductor Structure

CFET CELL ARCHITECTURE WITH A SIDE-ROUTING STRUCTURE

Method for Forming a Stacked FET Device

Method for Forming a Semiconductor Device Structure

3D INTEGRATED COUNT

3D INTEGRATED CIRCUIT

METHOD FOR FORMING TRANSISTOR STRUCTURES

SELF-ALIGNED CONTACTS FOR WALLED NANOSHEET AND FORKSHEET FIELD EFFE...

SELF-ALIGNED CONTACTS FOR NANOSHEET FIELD EFFECT TRANSISTOR DEVICES

SELF-ALIGNED LAYER PATTERNING

STANDARD CELL DEVICE AND METHOD OF FORMING AN INTERCONNECT STRUCTUR...

METHOD FOR FORMING AN INTERCONNECTION STRUCTURE

THREE-DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING...

METHOD FOR FORMING A MULTI-LEVEL INTERCONNECT STRUCTURE

SEMICONDUCTOR DEVICE AND METHOD OF FORMING SEMICONDUCTOR DEVICE

Semiconductor Device and Method

SEMICONDUCTOR DEVICE HAVING VERTICAL TRANSISTORS AND METHOD OF FORM...

METHOD OF FORMING VERTICAL CHANNEL DEVICES

VERTICAL CHANNEL DEVICES AND METHOD OF FABRICATING SAME

METHOD OF FORMING VERTICAL CHANNEL DEVICES

METHOD OF PATTERNING TARGET LAYER

METHOD FOR INTERRUPTING A LINE IN AN INTERCONNECT

SELF-ALIGNED GATE CONTACT

SELF-ALIGNED INTERCONNECTS