Juergen Dirks

Follow

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
On-chip scan clock generator for ASIC testing
- Patent number 7,975,197
- Issue date Jul 5, 2011
- LSI Corporation
- Iain Clark
- G01 - MEASURING TESTING
Information Patent Grant
Optimized buffering for JTAG boundary scan nets
- Patent number 7,000,163
- Issue date Feb 14, 2006
- LSI Logic Corporation
- Juergen Dirks
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
On-chip scan clock generator for asic testing
- Publication number 20040193981
- Publication date Sep 30, 2004
- Iain Clark
- G01 - MEASURING TESTING