Juergen Koehl

Person

Weil Schoenbuch, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Instruction scheduling approach to improve processor performance
- Patent number 9,256,430
- Issue date Feb 9, 2016
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction scheduling approach to improve processor performance
- Patent number 8,972,961
- Issue date Mar 3, 2015
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction scheduling approach to improve processor performance
- Patent number 8,935,685
- Issue date Jan 13, 2015
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit macro placement using macro aspect ratio based on ports
- Patent number 8,762,919
- Issue date Jun 24, 2014
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and data processing system to optimize performance of an ele...
- Patent number 8,522,187
- Issue date Aug 27, 2013
- International Business Machines Corporation
- Niels Fricke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal repowering chip for 3-dimensional integrated circuit
- Patent number 8,513,663
- Issue date Aug 20, 2013
- International Business Machines Corporation
- Markus Buehler
- G01 - MEASURING TESTING
Information Patent Grant
Method for computing the sensitivity of a VLSI design to both rando...
- Patent number 8,418,090
- Issue date Apr 9, 2013
- International Business Machines Corporation
- Jeanne P. Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundant micro-loop structure for use in an integrated circuit phy...
- Patent number 8,234,594
- Issue date Jul 31, 2012
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and computer program product for semiconductor yield esti...
- Patent number 8,136,066
- Issue date Mar 13, 2012
- International Business Machines Corporation
- Jeanne Paulette Spence Bickford
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method for computing the sensitivity of a VLSI design to both rando...
- Patent number 8,132,129
- Issue date Mar 6, 2012
- International Business Machines Corporation
- Jeanne P. Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for validating logical function and timing behavior of a dig...
- Patent number 8,056,037
- Issue date Nov 8, 2011
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Routing of wires of an electronic circuit
- Patent number 8,015,527
- Issue date Sep 6, 2011
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test yield estimate for semiconductor products created from a library
- Patent number 8,010,916
- Issue date Aug 30, 2011
- International Business Machines Corporation
- Jeanne Bickford
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and system for placement of electric circuit components in i...
- Patent number 8,010,925
- Issue date Aug 30, 2011
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer readable medium, system and associated method for designin...
- Patent number 7,996,808
- Issue date Aug 9, 2011
- International Business Machines Corporation
- Andreas Arp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Design structure for a redundant micro-loop structure for use in an...
- Patent number 7,984,394
- Issue date Jul 19, 2011
- International Business Machines Corporation
- Brent A. Anderson
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Via structure to improve routing of wires within an integrated circuit
- Patent number 7,962,881
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Markus T. Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Port assignment in hierarchical designs by abstracting macro logic
- Patent number 7,962,877
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundant micro-loop structure for use in an integrated circuit phy...
- Patent number 7,960,836
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for manufacturing diamond shaped chips
- Patent number 7,961,932
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Robert J. Allen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure for optimizing the signal time behavior of an electronic...
- Patent number 7,886,245
- Issue date Feb 8, 2011
- International Business Machines Corporation
- Guenther Hutzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for generating a layout for an integrated electro...
- Patent number 7,865,855
- Issue date Jan 4, 2011
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and computer system for optimizing the signal time behavior...
- Patent number 7,844,931
- Issue date Nov 30, 2010
- International Business Machines Corporation
- Guenther Hutzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundancy in signal distribution trees
- Patent number 7,755,408
- Issue date Jul 13, 2010
- International Business Machines Corporation
- Sebastian Ehrenreich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for routing data paths in a semiconductor chip with a plural...
- Patent number 7,526,743
- Issue date Apr 28, 2009
- International Business Machines Corporation
- Andreas Arp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor yield estimation
- Patent number 7,496,874
- Issue date Feb 24, 2009
- Inetrnational Business Machines Corporation
- Jeanne Paulette Spence Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for creating a layout for an electronic circuit
- Patent number 7,490,310
- Issue date Feb 10, 2009
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for computing the sensitivity of a VLSI design to both rando...
- Patent number 7,487,476
- Issue date Feb 3, 2009
- International Business Machines Corporation
- Jeanne P. Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Yield optimization in router for systematic defects
- Patent number 7,398,485
- Issue date Jul 8, 2008
- International Business Machines Corporation
- Jeanne P. Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Regular routing for deep sub-micron chip design
- Patent number 7,392,497
- Issue date Jun 24, 2008
- International Business Machines Corporation
- Uwe Fassnacht
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INSTRUCTION SCHEDULING APPROACH TO IMPROVE PROCESSOR PERFORMANCE
- Publication number 20150127926
- Publication date May 7, 2015
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SCHEDULING APPROACH TO IMPROVE PROCESSOR PERFORMANCE
- Publication number 20120216016
- Publication date Aug 23, 2012
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND DATA PROCESSING SYSTEM TO OPTIMIZE PERFORMANCE OF AN ELE...
- Publication number 20120144362
- Publication date Jun 7, 2012
- International Business Machines Corporation
- Niels Fricke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR COMPUTING THE SENSITIVITY OF A VLSI DESIGN TO BOTH RANDO...
- Publication number 20120137262
- Publication date May 31, 2012
- International Business Machines Corporation
- JEANNE P. BICKFORD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SCHEDULING APPROACH TO IMPROVE PROCESSOR PERFORMANCE
- Publication number 20110289297
- Publication date Nov 24, 2011
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit Macro Placement Using Macro Aspect Ratio Based on Ports
- Publication number 20110289468
- Publication date Nov 24, 2011
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POST-ROUTING COUPLING FIXES FOR INTEGRATED CIRCUITS
- Publication number 20100257503
- Publication date Oct 7, 2010
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Signal Repowering Chip For 3-Dimensional Integrated Circuit
- Publication number 20100237700
- Publication date Sep 23, 2010
- International Business Machines Corporation
- Markus Buehler
- G01 - MEASURING TESTING
Information Patent Application
Design Structure for a Redundant Micro-Loop Structure for use in an...
- Publication number 20100211923
- Publication date Aug 19, 2010
- International Business Machines Corporation
- Brent A. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PORT ASSIGNMENT IN HIERARCHICAL DESIGNS BY ABSTRACTING MACRO LOGIC
- Publication number 20100037198
- Publication date Feb 11, 2010
- International Business Machines Corporation
- Joachim Keinert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIA STRUCTURE TO IMPROVE ROUTING OF WIRES WITHIN AN INTEGRATED CIRCUIT
- Publication number 20100031220
- Publication date Feb 4, 2010
- International Business Machines Corporation
- Markus T. Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Design Structure for a Redundant Micro-Loop Structure for use in an...
- Publication number 20090158231
- Publication date Jun 18, 2009
- International Business Machines Corporation
- Brent A. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND COMPUTER PROGRAM PRODUCT FOR SEMICONDUCTOR YIELD ESTI...
- Publication number 20090113364
- Publication date Apr 30, 2009
- International Business Machines Corporation
- Jeanne Paulette Spence Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR COMPUTING THE SENSISTIVITY OF A VLSI DESIGN TO BOTH RAND...
- Publication number 20090113360
- Publication date Apr 30, 2009
- International Business Machines Corporation
- JEANNE P. BICKFORD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Violating the Logical Function and Timing Behavior of a...
- Publication number 20090083684
- Publication date Mar 26, 2009
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR GENERATING A LAYOUT FOR AN INTEGRATED ELECTRO...
- Publication number 20090064069
- Publication date Mar 5, 2009
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer Readable Medium, System and Associated Method For Designin...
- Publication number 20090031274
- Publication date Jan 29, 2009
- International Business Machines Corporation
- Andreas Arp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Delay Calculation Method, A Data Processing Program and A Computer...
- Publication number 20090013293
- Publication date Jan 8, 2009
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Placement of Electric Circuit Components in I...
- Publication number 20080301612
- Publication date Dec 4, 2008
- International Business Machines Corporation
- Markus Buehler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Redundancy in Signal Distribution Trees
- Publication number 20080256413
- Publication date Oct 16, 2008
- International Business Machines Corporation
- Sebastian Ehrenreich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Computer System for Otimizing the Signal Time Behavior o...
- Publication number 20080216042
- Publication date Sep 4, 2008
- Guenther Hutzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Structure for Optimizing the Signal Time Behavior of an Electronic...
- Publication number 20080216043
- Publication date Sep 4, 2008
- Guenther Hutzl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST YIELD ESTIMATE FOR SEMICONDUCTOR PRODUCTS CREATED FROM A LIBRARY
- Publication number 20080189664
- Publication date Aug 7, 2008
- International Business Machines Corporation
- Jeanne Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUNDANT MICRO-LOOP STRUCTURE FOR USE IN AN INTERGRATED CIRCUIT PH...
- Publication number 20080150149
- Publication date Jun 26, 2008
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Redundant Micro-Loop Structure For Use In An Integrated Circuit Phy...
- Publication number 20080097738
- Publication date Apr 24, 2008
- Brent A. Anderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and System for Designing Fan-out Nets Connecting a Signal So...
- Publication number 20080059933
- Publication date Mar 6, 2008
- International Business Machines Corporation
- Erich Barke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MANUFACTURING DIAMOND SHAPED CHIPS
- Publication number 20080018872
- Publication date Jan 24, 2008
- IBM
- Robert J. Allen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR COMPUTING THE SENSITIVITY OF A VLSI DESIGN TO BOTH RANDO...
- Publication number 20070240085
- Publication date Oct 11, 2007
- Jeanne P. Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
YIELD OPTIMIZATION IN ROUTER FOR SYSTEMATIC DEFECTS
- Publication number 20070240090
- Publication date Oct 11, 2007
- Jeanne P Bickford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
A METHOD , APPARATUS AND COMPUTER PROGRAM PRODUCT FOR SEMICONDUCTOR...
- Publication number 20070143720
- Publication date Jun 21, 2007
- Jeanne Paulette Spence Bickford
- G06 - COMPUTING CALCULATING COUNTING

Juergen Koehl

Person

Patents Grantslast 30 patents

Instruction scheduling approach to improve processor performance

Instruction scheduling approach to improve processor performance

Instruction scheduling approach to improve processor performance

Circuit macro placement using macro aspect ratio based on ports

Method and data processing system to optimize performance of an ele...

Signal repowering chip for 3-dimensional integrated circuit

Method for computing the sensitivity of a VLSI design to both rando...

Redundant micro-loop structure for use in an integrated circuit phy...

Apparatus and computer program product for semiconductor yield esti...

Method for computing the sensitivity of a VLSI design to both rando...

Method for validating logical function and timing behavior of a dig...

Routing of wires of an electronic circuit

Test yield estimate for semiconductor products created from a library

Method and system for placement of electric circuit components in i...

Computer readable medium, system and associated method for designin...

Design structure for a redundant micro-loop structure for use in an...

Via structure to improve routing of wires within an integrated circuit

Port assignment in hierarchical designs by abstracting macro logic

Redundant micro-loop structure for use in an integrated circuit phy...

Method and apparatus for manufacturing diamond shaped chips

Structure for optimizing the signal time behavior of an electronic...

Method and system for generating a layout for an integrated electro...

Method and computer system for optimizing the signal time behavior...

Redundancy in signal distribution trees

Method for routing data paths in a semiconductor chip with a plural...

Semiconductor yield estimation

Method for creating a layout for an electronic circuit

Method for computing the sensitivity of a VLSI design to both rando...

Yield optimization in router for systematic defects

Regular routing for deep sub-micron chip design

Patents Applicationslast 30 patents

INSTRUCTION SCHEDULING APPROACH TO IMPROVE PROCESSOR PERFORMANCE

INSTRUCTION SCHEDULING APPROACH TO IMPROVE PROCESSOR PERFORMANCE

METHOD AND DATA PROCESSING SYSTEM TO OPTIMIZE PERFORMANCE OF AN ELE...

METHOD FOR COMPUTING THE SENSITIVITY OF A VLSI DESIGN TO BOTH RANDO...

INSTRUCTION SCHEDULING APPROACH TO IMPROVE PROCESSOR PERFORMANCE

Circuit Macro Placement Using Macro Aspect Ratio Based on Ports

POST-ROUTING COUPLING FIXES FOR INTEGRATED CIRCUITS

Signal Repowering Chip For 3-Dimensional Integrated Circuit

Design Structure for a Redundant Micro-Loop Structure for use in an...

PORT ASSIGNMENT IN HIERARCHICAL DESIGNS BY ABSTRACTING MACRO LOGIC

VIA STRUCTURE TO IMPROVE ROUTING OF WIRES WITHIN AN INTEGRATED CIRCUIT

Design Structure for a Redundant Micro-Loop Structure for use in an...

APPARATUS AND COMPUTER PROGRAM PRODUCT FOR SEMICONDUCTOR YIELD ESTI...

METHOD FOR COMPUTING THE SENSISTIVITY OF A VLSI DESIGN TO BOTH RAND...

Method for Violating the Logical Function and Timing Behavior of a...

METHOD AND SYSTEM FOR GENERATING A LAYOUT FOR AN INTEGRATED ELECTRO...

Computer Readable Medium, System and Associated Method For Designin...

Delay Calculation Method, A Data Processing Program and A Computer...

Method and System for Placement of Electric Circuit Components in I...

Redundancy in Signal Distribution Trees

Method and Computer System for Otimizing the Signal Time Behavior o...

Structure for Optimizing the Signal Time Behavior of an Electronic...

TEST YIELD ESTIMATE FOR SEMICONDUCTOR PRODUCTS CREATED FROM A LIBRARY

REDUNDANT MICRO-LOOP STRUCTURE FOR USE IN AN INTERGRATED CIRCUIT PH...

Redundant Micro-Loop Structure For Use In An Integrated Circuit Phy...

Method and System for Designing Fan-out Nets Connecting a Signal So...

METHOD AND APPARATUS FOR MANUFACTURING DIAMOND SHAPED CHIPS

METHOD FOR COMPUTING THE SENSITIVITY OF A VLSI DESIGN TO BOTH RANDO...

YIELD OPTIMIZATION IN ROUTER FOR SYSTEMATIC DEFECTS

A METHOD , APPARATUS AND COMPUTER PROGRAM PRODUCT FOR SEMICONDUCTOR...