Julien Delalleau

Person

Aix-en-Provence, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit including a capacitive element and corresponding...
- Patent number 12,057,513
- Issue date Aug 6, 2024
- STMicroelectronics (Rousset) SAS
- Christian Rivero
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit containing a decoy structure
- Patent number 12,051,656
- Issue date Jul 30, 2024
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory device with vertical state transistor and verti...
- Patent number 11,943,931
- Issue date Mar 26, 2024
- STMicroelectronics (Rousset) SAS
- Quentin Hubert
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit including a capacitive element and corresponding...
- Patent number 11,721,773
- Issue date Aug 8, 2023
- STMicroelectronics (Rousset) SAS
- Christian Rivero
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit containing a decoy structure
- Patent number 11,581,270
- Issue date Feb 14, 2023
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fabrication process comprising an operation of defining an effectiv...
- Patent number 11,424,342
- Issue date Aug 23, 2022
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for detecting an attempt to breach the integrity of a semico...
- Patent number 11,387,194
- Issue date Jul 12, 2022
- STMicroelectronics (Rousset) SAS
- Alexandre Sarafianos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transistor comprising a lengthened gate
- Patent number 11,270,886
- Issue date Mar 8, 2022
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory device with vertical state transistor and verti...
- Patent number 10,991,710
- Issue date Apr 27, 2021
- STMicroelectronics (Rousset) SAS
- Quentin Hubert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Compact non-volatile memory device
- Patent number 10,930,351
- Issue date Feb 23, 2021
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit containing a decoy structure formed by an electr...
- Patent number 10,804,222
- Issue date Oct 13, 2020
- STMicrolectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor comprising a lengthened gate
- Patent number 10,797,158
- Issue date Oct 6, 2020
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit having a hidden shared contact
- Patent number 10,763,213
- Issue date Sep 1, 2020
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS transistor with reduced hump effect
- Patent number 10,714,583
- Issue date Jul 14, 2020
- STMicroelectronics (Rousset) SAS
- Christian Rivero
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell comprising non-self-aligned horizontal and vertical con...
- Patent number 10,686,046
- Issue date Jun 16, 2020
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- G11 - INFORMATION STORAGE
Information Patent Grant
Double-gate MOS transistor with increased breakdown voltage
- Patent number 10,593,772
- Issue date Mar 17, 2020
- STMicroelectronics (Rousset) SAS
- Christian Rivero
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell comprising non-self-aligned horizontal and vertical con...
- Patent number 10,403,730
- Issue date Sep 3, 2019
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Compact non-volatile memory device
- Patent number 10,366,757
- Issue date Jul 30, 2019
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical memory cell with non-self-aligned floating drain-source im...
- Patent number 10,192,999
- Issue date Jan 29, 2019
- STMicroelectronics (Rousset) SAS
- Marc Mantelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical bipolar transistor
- Patent number 10,128,314
- Issue date Nov 13, 2018
- STMicroelectronics (Rousset) SAS
- Philippe Boivin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Compact non-volatile memory device
- Patent number 10,074,429
- Issue date Sep 11, 2018
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing a high-voltage transistor with reduced footpri...
- Patent number 9,978,847
- Issue date May 22, 2018
- STMicroelectronics (Roussett) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell comprising non-self-aligned horizontal and vertical con...
- Patent number 9,941,369
- Issue date Apr 10, 2018
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- G11 - INFORMATION STORAGE
Information Patent Grant
Compact non-volatile memory device
- Patent number 9,922,712
- Issue date Mar 20, 2018
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical memory cell with non-self-aligned floating drain-source im...
- Patent number 9,876,122
- Issue date Jan 23, 2018
- STMicroelectronics (Rousset) SAS
- Marc Mantelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical bipolar transistor
- Patent number 9,570,513
- Issue date Feb 14, 2017
- STMicroelectronics (Rousset) SAS
- Philippe Boivin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical transistor for resistive memory
- Patent number 9,559,297
- Issue date Jan 31, 2017
- STMicroelectronics (Rousset) SAS
- Philippe Boivin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical memory cell with non-self-aligned floating drain-source im...
- Patent number 9,543,311
- Issue date Jan 10, 2017
- STMicroelectronics (Rousset) SAS
- Marc Mantelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical transistor for resistive memory
- Patent number 9,425,239
- Issue date Aug 23, 2016
- STMicroelectronics (Rousset) SAS
- Philippe Boivin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell comprising non-self-aligned horizontal and vertical con...
- Patent number 9,406,686
- Issue date Aug 2, 2016
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATED CIRCUIT CONTAINING A DECOY STRUCTURE
- Publication number 20240347481
- Publication date Oct 17, 2024
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRONIC CIRCUIT COMPRISING A TRANSISTOR CELL
- Publication number 20240215233
- Publication date Jun 27, 2024
- STMicroelectronics International N.V.
- Brice ARRAZAT
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOSFET TRANSISTOR
- Publication number 20240063280
- Publication date Feb 22, 2024
- STMicroelectronics (Rousset) SAS
- Franck JULIEN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT INCLUDING A CAPACITIVE ELEMENT AND CORRESPONDING...
- Publication number 20230327028
- Publication date Oct 12, 2023
- STMicroelectronics (Rousset) SAS
- Christian RIVERO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT CONTAINING A DECOY STRUCTURE
- Publication number 20230163083
- Publication date May 25, 2023
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT INCLUDING A CAPACITIVE ELEMENT AND CORRESPONDING...
- Publication number 20220005960
- Publication date Jan 6, 2022
- STMicroelectronics (Rousset) SAS
- Christian RIVERO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-VOLATILE MEMORY DEVICE WITH VERTICAL STATE TRANSISTOR AND VERTI...
- Publication number 20210225853
- Publication date Jul 22, 2021
- STMicroelectronics (Rousset) SAS
- Quentin Hubert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FABRICATION PROCESS COMPRISING AN OPERATION OF DEFINING AN EFFECTIV...
- Publication number 20210036126
- Publication date Feb 4, 2021
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT CONTAINING A DECOY STRUCTURE
- Publication number 20200402928
- Publication date Dec 24, 2020
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR COMPRISING A LENGTHENED GATE
- Publication number 20200395466
- Publication date Dec 17, 2020
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR DETECTING AN ATTEMPT TO BREACH THE INTEGRITY OF A SEMICO...
- Publication number 20200365528
- Publication date Nov 19, 2020
- STMicroelectronics (Rousset) SAS
- Alexandre SARAFIANOS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DOUBLE-GATE MOS TRANSISTOR WITH INCREASED BREAKDOWN VOLTAGE
- Publication number 20200176577
- Publication date Jun 4, 2020
- STMicroelectronics (Rousset) SAS
- Christian Rivero
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Non-Volatile Memory Device and Manufacturing Method
- Publication number 20190341390
- Publication date Nov 7, 2019
- STMicroelectronics (Rousset) SAS
- Quentin Hubert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CELL COMPRISING NON-SELF-ALIGNED HORIZONTAL AND VERTICAL CON...
- Publication number 20190341462
- Publication date Nov 7, 2019
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPACT NON-VOLATILE MEMORY DEVICE
- Publication number 20190295648
- Publication date Sep 26, 2019
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT HAVING A HIDDEN SHARED CONTACT
- Publication number 20190027439
- Publication date Jan 24, 2019
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT CONTAINING A DECOY STRUCTURE
- Publication number 20190027447
- Publication date Jan 24, 2019
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DOUBLE-GATE MOS TRANSISTOR WITH INCREASED BREAKDOWN VOLTAGE
- Publication number 20190027566
- Publication date Jan 24, 2019
- STMicroelectronics (Rousset) SAS
- Christian Rivero
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOS TRANSISTOR WITH REDUCED HUMP EFFECT
- Publication number 20190027565
- Publication date Jan 24, 2019
- STMicroelectronics (Rousset) SAS
- Christian RIVERO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR COMPRISING A LENGTHENED GATE
- Publication number 20190027581
- Publication date Jan 24, 2019
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPACT NON-VOLATILE MEMORY DEVICE
- Publication number 20190006008
- Publication date Jan 3, 2019
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL COMPRISING NON-SELF-ALIGNED HORIZONTAL AND VERTICAL CON...
- Publication number 20180197963
- Publication date Jul 12, 2018
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPACT NON-VOLATILE MEMORY DEVICE
- Publication number 20180174655
- Publication date Jun 21, 2018
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL MEMORY CELL WITH NON-SELF-ALIGNED FLOATING DRAIN-SOURCE IM...
- Publication number 20180145183
- Publication date May 24, 2018
- STMicroelectronics (Rousset) SAS
- Marc MANTELLI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COMPACT NON-VOLATILE MEMORY DEVICE
- Publication number 20180040376
- Publication date Feb 8, 2018
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR PRODUCING A HIGH-VOLTAGE TRANSISTOR WITH REDUCED FOOTPRI...
- Publication number 20170179247
- Publication date Jun 22, 2017
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL BIPOLAR TRANSISTOR
- Publication number 20170117326
- Publication date Apr 27, 2017
- STMicroelectronics (Rousset) SAS
- Philippe Boivin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL MEMORY CELL WITH NON-SELF-ALIGNED FLOATING DRAIN-SOURCE IM...
- Publication number 20170084749
- Publication date Mar 23, 2017
- STMicroelectronics (Rousset) SAS
- Marc MANTELLI
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR PRODUCING A HIGH-VOLTAGE TRANSISTOR WITH REDUCED FOOTPRI...
- Publication number 20170012104
- Publication date Jan 12, 2017
- STMicroelectronics (Rousset) SAS
- Julien Delalleau
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICAL TRANSISTOR FOR RESISTIVE MEMORY
- Publication number 20160329490
- Publication date Nov 10, 2016
- STMicroelectronics (Rousset) SAS
- Philippe BOIVIN
- H01 - BASIC ELECTRIC ELEMENTS

Julien Delalleau

Person

Patents Grantslast 30 patents

Integrated circuit including a capacitive element and corresponding...

Integrated circuit containing a decoy structure

Non-volatile memory device with vertical state transistor and verti...

Integrated circuit including a capacitive element and corresponding...

Integrated circuit containing a decoy structure

Fabrication process comprising an operation of defining an effectiv...

Method for detecting an attempt to breach the integrity of a semico...

Transistor comprising a lengthened gate

Non-volatile memory device with vertical state transistor and verti...

Compact non-volatile memory device

Integrated circuit containing a decoy structure formed by an electr...

Transistor comprising a lengthened gate

Integrated circuit having a hidden shared contact

MOS transistor with reduced hump effect

Memory cell comprising non-self-aligned horizontal and vertical con...

Double-gate MOS transistor with increased breakdown voltage

Memory cell comprising non-self-aligned horizontal and vertical con...

Compact non-volatile memory device

Vertical memory cell with non-self-aligned floating drain-source im...

Vertical bipolar transistor

Compact non-volatile memory device

Method for producing a high-voltage transistor with reduced footpri...

Memory cell comprising non-self-aligned horizontal and vertical con...

Compact non-volatile memory device

Vertical memory cell with non-self-aligned floating drain-source im...

Vertical bipolar transistor

Vertical transistor for resistive memory

Vertical memory cell with non-self-aligned floating drain-source im...

Vertical transistor for resistive memory

Memory cell comprising non-self-aligned horizontal and vertical con...

Patents Applicationslast 30 patents

INTEGRATED CIRCUIT CONTAINING A DECOY STRUCTURE

ELECTRONIC CIRCUIT COMPRISING A TRANSISTOR CELL

MOSFET TRANSISTOR

INTEGRATED CIRCUIT INCLUDING A CAPACITIVE ELEMENT AND CORRESPONDING...

INTEGRATED CIRCUIT CONTAINING A DECOY STRUCTURE

INTEGRATED CIRCUIT INCLUDING A CAPACITIVE ELEMENT AND CORRESPONDING...

NON-VOLATILE MEMORY DEVICE WITH VERTICAL STATE TRANSISTOR AND VERTI...

FABRICATION PROCESS COMPRISING AN OPERATION OF DEFINING AN EFFECTIV...

INTEGRATED CIRCUIT CONTAINING A DECOY STRUCTURE

TRANSISTOR COMPRISING A LENGTHENED GATE

METHOD FOR DETECTING AN ATTEMPT TO BREACH THE INTEGRITY OF A SEMICO...

DOUBLE-GATE MOS TRANSISTOR WITH INCREASED BREAKDOWN VOLTAGE

Non-Volatile Memory Device and Manufacturing Method

MEMORY CELL COMPRISING NON-SELF-ALIGNED HORIZONTAL AND VERTICAL CON...

COMPACT NON-VOLATILE MEMORY DEVICE

INTEGRATED CIRCUIT HAVING A HIDDEN SHARED CONTACT

INTEGRATED CIRCUIT CONTAINING A DECOY STRUCTURE

DOUBLE-GATE MOS TRANSISTOR WITH INCREASED BREAKDOWN VOLTAGE

MOS TRANSISTOR WITH REDUCED HUMP EFFECT

TRANSISTOR COMPRISING A LENGTHENED GATE

COMPACT NON-VOLATILE MEMORY DEVICE

MEMORY CELL COMPRISING NON-SELF-ALIGNED HORIZONTAL AND VERTICAL CON...

COMPACT NON-VOLATILE MEMORY DEVICE

VERTICAL MEMORY CELL WITH NON-SELF-ALIGNED FLOATING DRAIN-SOURCE IM...

COMPACT NON-VOLATILE MEMORY DEVICE

METHOD FOR PRODUCING A HIGH-VOLTAGE TRANSISTOR WITH REDUCED FOOTPRI...

VERTICAL BIPOLAR TRANSISTOR

VERTICAL MEMORY CELL WITH NON-SELF-ALIGNED FLOATING DRAIN-SOURCE IM...

METHOD FOR PRODUCING A HIGH-VOLTAGE TRANSISTOR WITH REDUCED FOOTPRI...

VERTICAL TRANSISTOR FOR RESISTIVE MEMORY