Julien Sebot

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
System, apparatus and method for dynamic thermal distribution of a...
- Patent number 11,656,676
- Issue date May 23, 2023
- Intel Corporation
- Rolf Kuehnis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digitally coordinated dynamically adaptable clock and voltage suppl...
- Patent number 11,537,375
- Issue date Dec 27, 2022
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing microprocessor power with minimal performance impact by dy...
- Patent number 11,048,318
- Issue date Jun 29, 2021
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor to execute shift right merge instructions
- Patent number 10,732,973
- Issue date Aug 4, 2020
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor to execute shift right merge instructions
- Patent number 10,146,541
- Issue date Dec 4, 2018
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor to execute shift right merge instructions
- Patent number 9,218,184
- Issue date Dec 22, 2015
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,189,238
- Issue date Nov 17, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,189,237
- Issue date Nov 17, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,182,987
- Issue date Nov 10, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,182,985
- Issue date Nov 10, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,182,988
- Issue date Nov 10, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,170,814
- Issue date Oct 27, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitstream buffer manipulation with a SIMD merge instruction
- Patent number 9,170,815
- Issue date Oct 27, 2015
- Intel Corporation
- Yen-Kuang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor to execute shift right merge instructions
- Patent number 8,782,377
- Issue date Jul 15, 2014
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor to execute shift right merge instructions
- Patent number 8,745,358
- Issue date Jun 3, 2014
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast full search motion estimation with SIMD merge instruction
- Patent number 7,685,212
- Issue date Mar 23, 2010
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing horizontal addition and subtrac...
- Patent number 7,395,302
- Issue date Jul 1, 2008
- Intel Corporation
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for parallel shift right merge of data
- Patent number 7,272,622
- Issue date Sep 18, 2007
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS TO IMPLEMENT ADAPTIVE BRANCH PREDICTION THROTT...
- Publication number 20250004781
- Publication date Jan 2, 2025
- Intel Corporation
- Zeshan CHISHTI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VERTICAL BIT DATA PATHS FOR INTEGRATED CIRCUITS
- Publication number 20230317729
- Publication date Oct 5, 2023
- Intel Corporation
- Dmitri Evgenievich Nikonov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNOLOGIES FOR MAJORITY GATES
- Publication number 20230317847
- Publication date Oct 5, 2023
- Intel Corporation
- Hai Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEM, APPARATUS AND METHOD FOR DYNAMIC THERMAL DISTRIBUTION OF A...
- Publication number 20230315192
- Publication date Oct 5, 2023
- Intel Corporation
- Rolf Kuehnis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECTS WITH SPINTRONIC LOGIC DEVICES
- Publication number 20230284457
- Publication date Sep 7, 2023
- Intel Corporation
- Hai Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINE-GRAINED DISAGGREGATED SERVER ARCHITECTURE
- Publication number 20230187407
- Publication date Jun 15, 2023
- Intel Corporation
- Carleton L. Molnar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHYSICAL AND ELECTRICAL PROTOCOL TRANSLATION CHIPLETS
- Publication number 20230100228
- Publication date Mar 30, 2023
- Intel Corporation
- Gerald PASDAST
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HEAT INSULATING INTERCONNECT FEATURES IN A COMPONENT OF A COMPOSITE...
- Publication number 20220415853
- Publication date Dec 29, 2022
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THERMAL PERFORMANCE IN HYBRID BONDED 3D DIE STACKS
- Publication number 20220415743
- Publication date Dec 29, 2022
- Intel Corporation
- Feras Eid
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEVICE, METHOD AND SYSTEM TO MITIGATE STRESS ON HYBRID BONDS IN A M...
- Publication number 20220415837
- Publication date Dec 29, 2022
- Intel Corporation
- Kimin Jun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
QUASI-MONOLITHIC HIERARCHICAL INTEGRATION ARCHITECTURE
- Publication number 20220406751
- Publication date Dec 22, 2022
- Intel Corporation
- Adel A. Elsherbini
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THERMAL MANAGEMENT IN HORIZONTALLY OR VERTICALLY STACKED DIES
- Publication number 20220300049
- Publication date Sep 22, 2022
- Intel Corporation
- Somvir Singh Dahiya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITALLY COORDINATED DYNAMICALLY ADAPTABLE CLOCK AND VOLTAGE SUPPL...
- Publication number 20210055921
- Publication date Feb 25, 2021
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Dynamic Thermal Distribution Of A...
- Publication number 20200192462
- Publication date Jun 18, 2020
- Intel Corporation
- Rolf Kuehnis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING MICROPROCESSOR POWER WITH MINIMAL PERFORMANCE IMPACT BY DY...
- Publication number 20200183482
- Publication date Jun 11, 2020
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS
- Publication number 20190220280
- Publication date Jul 18, 2019
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS
- Publication number 20160070575
- Publication date Mar 10, 2016
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Method for Determining the Number of Execution Units...
- Publication number 20150241954
- Publication date Aug 27, 2015
- Avinash N. Ananthakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor to Execute Shift Right Merge Instructions
- Publication number 20130212359
- Publication date Aug 15, 2013
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS
- Publication number 20130007417
- Publication date Jan 3, 2013
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS
- Publication number 20120233443
- Publication date Sep 13, 2012
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for performing horizontal addition and subtrac...
- Publication number 20040078404
- Publication date Apr 22, 2004
- William W. Macy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for parallel shift right merge of data
- Publication number 20030131030
- Publication date Jul 10, 2003
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fast full search motion estimation with SIMD merge instruction
- Publication number 20030123748
- Publication date Jul 3, 2003
- Intel Corporation
- Julien Sebot
- G06 - COMPUTING CALCULATING COUNTING

Julien Sebot

Person

Patents Grantslast 30 patents

System, apparatus and method for dynamic thermal distribution of a...

Digitally coordinated dynamically adaptable clock and voltage suppl...

Reducing microprocessor power with minimal performance impact by dy...

Processor to execute shift right merge instructions

Processor to execute shift right merge instructions

Processor to execute shift right merge instructions

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Bitstream buffer manipulation with a SIMD merge instruction

Processor to execute shift right merge instructions

Processor to execute shift right merge instructions

Fast full search motion estimation with SIMD merge instruction

Method and apparatus for performing horizontal addition and subtrac...

Method and apparatus for parallel shift right merge of data

Patents Applicationslast 30 patents

METHOD AND APPARATUS TO IMPLEMENT ADAPTIVE BRANCH PREDICTION THROTT...

VERTICAL BIT DATA PATHS FOR INTEGRATED CIRCUITS

TECHNOLOGIES FOR MAJORITY GATES

SYSTEM, APPARATUS AND METHOD FOR DYNAMIC THERMAL DISTRIBUTION OF A...

INTERCONNECTS WITH SPINTRONIC LOGIC DEVICES

FINE-GRAINED DISAGGREGATED SERVER ARCHITECTURE

PHYSICAL AND ELECTRICAL PROTOCOL TRANSLATION CHIPLETS

HEAT INSULATING INTERCONNECT FEATURES IN A COMPONENT OF A COMPOSITE...

THERMAL PERFORMANCE IN HYBRID BONDED 3D DIE STACKS

DEVICE, METHOD AND SYSTEM TO MITIGATE STRESS ON HYBRID BONDS IN A M...

QUASI-MONOLITHIC HIERARCHICAL INTEGRATION ARCHITECTURE

THERMAL MANAGEMENT IN HORIZONTALLY OR VERTICALLY STACKED DIES

DIGITALLY COORDINATED DYNAMICALLY ADAPTABLE CLOCK AND VOLTAGE SUPPL...

System, Apparatus And Method For Dynamic Thermal Distribution Of A...

REDUCING MICROPROCESSOR POWER WITH MINIMAL PERFORMANCE IMPACT BY DY...

PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS

PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS

Apparatus and Method for Determining the Number of Execution Units...

Processor to Execute Shift Right Merge Instructions

PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS

PROCESSOR TO EXECUTE SHIFT RIGHT MERGE INSTRUCTIONS

Method and apparatus for performing horizontal addition and subtrac...

Method and apparatus for parallel shift right merge of data

Fast full search motion estimation with SIMD merge instruction