Jun Steed Huang

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Kanata, CA

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Patents Grantslast 30 patents

Information Patent Grant
Phase locked loop frequency synthesizer with reduced jitter
- Patent number 9,143,138
- Issue date Sep 22, 2015
- Microsemi Semiconductor ULC
- Jun Steed Huang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of adjusting a local clock in asynchronous packet networks
- Patent number 9,059,811
- Issue date Jun 16, 2015
- Microsemi Semiconductor ULC
- Jun Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
PHASE LOCKED LOOP FREQUENCY SYNTHESIZER WITH REDUCED JITTER
- Publication number 20140241467
- Publication date Aug 28, 2014
- MICROSEMI SEMICONDUCTOR ULC
- Jun Steed Huang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD OF ADJUSTING A LOCAL CLOCK IN ASYNCHRONOUS PACKET NETWORKS
- Publication number 20130308660
- Publication date Nov 21, 2013
- Jun Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE