Junqing Sun

Person

FREMONT, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Receivers and method with fast sampling phase and frequency acquisi...
- Patent number 12,261,928
- Issue date Mar 25, 2025
- CREDO TECHNOLOGY GROUP LIMITED
- Yu Liao
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Decision feedback equalization with efficient burst error correction
- Patent number 11,936,505
- Issue date Mar 19, 2024
- CREDO TECHNOLOGY GROUP LIMITED
- Yu Liao
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receiver using pseudo partial response maximum likelihood sequence...
- Patent number 11,831,475
- Issue date Nov 28, 2023
- CREDO TECHNOLOGY GROUP LIMITED
- Yu Liao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reduced-complexity maximum likelihood sequence detector suitable fo...
- Patent number 11,831,473
- Issue date Nov 28, 2023
- CREDO TECHNOLOGY GROUP LIMITED
- Yu Liao
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receiver with threshold level finder
- Patent number 11,646,916
- Issue date May 9, 2023
- Credo Technology Group Ltd.
- Junqing (Phil) Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Onboard/co-packaged optics with transmit-side equalization
- Patent number 11,616,576
- Issue date Mar 28, 2023
- Credo Technology Group Ltd.
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Equalizer with perturbation effect based adaptation
- Patent number 11,570,024
- Issue date Jan 31, 2023
- CREDO TECHNOLOGY GROUP LIMITED
- Fang Cai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Power-efficient nonlinear equalizers and methods
- Patent number 11,451,417
- Issue date Sep 20, 2022
- Credo Technology Group Ltd.
- Junqing (Phil) Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Retimer training during link speed negotiation and link training
- Patent number 11,424,968
- Issue date Aug 23, 2022
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Equalizer training during link speed negotiation
- Patent number 11,356,302
- Issue date Jun 7, 2022
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital filtering using combined approximate summation of partial p...
- Patent number 11,347,476
- Issue date May 31, 2022
- CREDO TECHNOLOGY GROUP LIMITED
- Tianchen Luo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel channel skew for enhanced error correction
- Patent number 11,309,995
- Issue date Apr 19, 2022
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for testing jitter tolerance
- Patent number 11,300,613
- Issue date Apr 12, 2022
- CREDO TECHNOLOGY GROUP LIMITED
- Arshan Aga
- G01 - MEASURING TESTING
Information Patent Grant
Clock recovery using between-interval timing error estimation
- Patent number 11,231,740
- Issue date Jan 25, 2022
- CREDO TECHNOLOGY GROUP LIMITED
- Fang Cai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serdes equalization for short, reflective channels
- Patent number 11,228,468
- Issue date Jan 18, 2022
- CREDO TECHNOLOGY GROUP LIMITED
- Yasuo Hidaka
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Equalizer with perturbation effect based adaptation
- Patent number 11,196,592
- Issue date Dec 7, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Fang Cai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Digital equalizer with overlappable filter taps
- Patent number 11,171,815
- Issue date Nov 9, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Decision feedback equalizer with fractional tap unrolling
- Patent number 11,128,497
- Issue date Sep 21, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing (Phil) Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
On-chip jitter evaluation for SerDes
- Patent number 11,038,602
- Issue date Jun 15, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Serdes pre-equalizer having adaptable preset coefficient registers
- Patent number 11,032,111
- Issue date Jun 8, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-function level finder for serdes
- Patent number 11,018,656
- Issue date May 25, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing (Phil) Sun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Efficient multi-mode DFE
- Patent number 11,005,567
- Issue date May 11, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Eye monitor for parallelized digital equalizers
- Patent number 10,992,501
- Issue date Apr 27, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Second-order clock recovery using three feedback paths
- Patent number 10,892,763
- Issue date Jan 12, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Yasuo Hidaka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
SerDes equalization for short, reflective channels
- Patent number 10,880,130
- Issue date Dec 29, 2020
- CREDO TECHNOLOGY GROUP LIMITED
- Yasuo Hidaka
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Parallel mixed-signal equalization for high-speed serial link
- Patent number 10,728,059
- Issue date Jul 28, 2020
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Precompensator-based quantization for clock recovery
- Patent number 10,447,509
- Issue date Oct 15, 2019
- Credo Technology Group Limited
- Fang Cai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Controlling false packet acceptance
- Patent number 10,256,944
- Issue date Apr 9, 2019
- Marvell International Ltd.
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
SerDes architecture with a hidden backchannel protocol
- Patent number 10,212,260
- Issue date Feb 19, 2019
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Signal detection and power measurement with multi-band filter to mi...
- Patent number 10,090,870
- Issue date Oct 2, 2018
- Marvell International Ltd.
- Shaoan Dai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
RECEIVERS AND METHOD WITH FAST SAMPLING PHASE AND FREQUENCY ACQUISI...
- Publication number 20250038944
- Publication date Jan 30, 2025
- CREDO TECHNOLOGY GROUP LIMITED
- YU LIAO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FAST EFFICIENT DECODER FOR LOW DISTANCE RS AND BCH CODES
- Publication number 20240388312
- Publication date Nov 21, 2024
- CREDO TECHNOLOGY GROUP LIMITED
- CHANG SHU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CLOCK RECOVERY WITH LOOP DELAY CANCELLATION
- Publication number 20240187204
- Publication date Jun 6, 2024
- CREDO TECHNOLOGY GROUP LIMITED
- YASUO HIDAKA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECEIVER USING PSEUDO PARTIAL RESPONSE MAXIMUM LIKELIHOOD SEQUENCE...
- Publication number 20230403183
- Publication date Dec 14, 2023
- CREDO TECHNOLOGY GROUP LIMITED
- YU LIAO
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DECISION FEEDBACK EQUALIZATION WITH EFFICIENT BURST ERROR CORRECTION
- Publication number 20230318883
- Publication date Oct 5, 2023
- Credo Technology Group Ltd.
- YU LIAO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
REDUCED-COMPLEXITY MAXIMUM LIKELIHOOD SEQUENCE DETECTOR SUITABLE FO...
- Publication number 20230308315
- Publication date Sep 28, 2023
- Credo Technology Group Ltd.
- Yu LIAO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Transitioning Between Signal Constellations
- Publication number 20230254188
- Publication date Aug 10, 2023
- Credo Technology Group Ltd.
- FANG CAI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Onboard/Co-packaged Optics with Transmit-Side Equalization
- Publication number 20230010441
- Publication date Jan 12, 2023
- Credo Technology Group Ltd.
- JUNQING (PHIL) SUN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
EQUALIZER TRAINING DURING LINK SPEED NEGOTIATION
- Publication number 20220173941
- Publication date Jun 2, 2022
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DIGITAL FILTERING USING COMBINED APPROXIMATE SUMMATION OF PARTIAL P...
- Publication number 20220113939
- Publication date Apr 14, 2022
- CREDO TECHNOLOGY GROUP LIMITED
- Tianchen LUO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR TESTING JITTER TOLERANCE
- Publication number 20220082618
- Publication date Mar 17, 2022
- CREDO TECHNOLOGY GROUP LIMITED
- Arshan AGA
- G01 - MEASURING TESTING
Information Patent Application
EQUALIZER WITH PERTURBATION EFFECT BASED ADAPTATION
- Publication number 20220052884
- Publication date Feb 17, 2022
- CREDO TECHNOLOGY GROUP LIMITED
- FANG CAI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SERDES EQUALIZATION FOR SHORT, REFLECTIVE CHANNELS
- Publication number 20210306186
- Publication date Sep 30, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Yasuo HIDAKA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECEIVER WITH THRESHOLD LEVEL FINDER
- Publication number 20210242861
- Publication date Aug 5, 2021
- Credo Technology Group Ltd.
- JUNQING (PHIL) SUN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITAL EQUALIZER WITH OVERLAPPABLE FILTER TAPS
- Publication number 20210226824
- Publication date Jul 22, 2021
- Junqing SUN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MULTI-FUNCTION LEVEL FINDER FOR SERDES
- Publication number 20210160106
- Publication date May 27, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing (Phil) SUN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PARALLEL CHANNEL SKEW FOR ENHANCED ERROR CORRECTION
- Publication number 20210013998
- Publication date Jan 14, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
EFFICIENT MULTI-MODE DFE
- Publication number 20210006335
- Publication date Jan 7, 2021
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Clock Recovery Using Between-Interval Timing Error Estimation
- Publication number 20200249714
- Publication date Aug 6, 2020
- CREDO TECHNOLOGY GROUP LIMITED
- Fang CAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERDES PRE-EQUALIZER HAVING ADAPTABLE PRESET COEFFICIENT REGISTERS
- Publication number 20200076651
- Publication date Mar 5, 2020
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing SUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERDES ARCHITECTURE WITH A HIDDEN BACKCHANNEL PROTOCOL
- Publication number 20190028574
- Publication date Jan 24, 2019
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Communications Link Performance Analyzer that Accommodates Forward...
- Publication number 20170155440
- Publication date Jun 1, 2017
- CREDO TECHNOLOGY GROUP LIMITED
- Junqing Sun
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Junqing Sun

Person

Patents Grantslast 30 patents

Receivers and method with fast sampling phase and frequency acquisi...

Decision feedback equalization with efficient burst error correction

Receiver using pseudo partial response maximum likelihood sequence...

Reduced-complexity maximum likelihood sequence detector suitable fo...

Receiver with threshold level finder

Onboard/co-packaged optics with transmit-side equalization

Equalizer with perturbation effect based adaptation

Power-efficient nonlinear equalizers and methods

Retimer training during link speed negotiation and link training

Equalizer training during link speed negotiation

Digital filtering using combined approximate summation of partial p...

Parallel channel skew for enhanced error correction

Systems and methods for testing jitter tolerance

Clock recovery using between-interval timing error estimation

Serdes equalization for short, reflective channels

Equalizer with perturbation effect based adaptation

Digital equalizer with overlappable filter taps

Decision feedback equalizer with fractional tap unrolling

On-chip jitter evaluation for SerDes

Serdes pre-equalizer having adaptable preset coefficient registers

Multi-function level finder for serdes

Efficient multi-mode DFE

Eye monitor for parallelized digital equalizers

Second-order clock recovery using three feedback paths

SerDes equalization for short, reflective channels

Parallel mixed-signal equalization for high-speed serial link

Precompensator-based quantization for clock recovery

Controlling false packet acceptance

SerDes architecture with a hidden backchannel protocol

Signal detection and power measurement with multi-band filter to mi...

Patents Applicationslast 30 patents

RECEIVERS AND METHOD WITH FAST SAMPLING PHASE AND FREQUENCY ACQUISI...

FAST EFFICIENT DECODER FOR LOW DISTANCE RS AND BCH CODES

CLOCK RECOVERY WITH LOOP DELAY CANCELLATION

RECEIVER USING PSEUDO PARTIAL RESPONSE MAXIMUM LIKELIHOOD SEQUENCE...

DECISION FEEDBACK EQUALIZATION WITH EFFICIENT BURST ERROR CORRECTION

REDUCED-COMPLEXITY MAXIMUM LIKELIHOOD SEQUENCE DETECTOR SUITABLE FO...

Transitioning Between Signal Constellations

Onboard/Co-packaged Optics with Transmit-Side Equalization

EQUALIZER TRAINING DURING LINK SPEED NEGOTIATION

DIGITAL FILTERING USING COMBINED APPROXIMATE SUMMATION OF PARTIAL P...

SYSTEMS AND METHODS FOR TESTING JITTER TOLERANCE

EQUALIZER WITH PERTURBATION EFFECT BASED ADAPTATION

SERDES EQUALIZATION FOR SHORT, REFLECTIVE CHANNELS

RECEIVER WITH THRESHOLD LEVEL FINDER

DIGITAL EQUALIZER WITH OVERLAPPABLE FILTER TAPS

MULTI-FUNCTION LEVEL FINDER FOR SERDES

PARALLEL CHANNEL SKEW FOR ENHANCED ERROR CORRECTION

EFFICIENT MULTI-MODE DFE

Clock Recovery Using Between-Interval Timing Error Estimation

SERDES PRE-EQUALIZER HAVING ADAPTABLE PRESET COEFFICIENT REGISTERS

SERDES ARCHITECTURE WITH A HIDDEN BACKCHANNEL PROTOCOL

Communications Link Performance Analyzer that Accommodates Forward...