Jurgen M. Schulz

Person

Pleasanton, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Allocation of a buffer located in system memory into a cache memory
- Patent number 11,893,251
- Issue date Feb 6, 2024
- Apple Inc.
- Rohit Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable interface circuit
- Patent number 11,755,489
- Issue date Sep 12, 2023
- Apple Inc.
- Rohit K. Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic allocation of cache memory as RAM
- Patent number 11,704,245
- Issue date Jul 18, 2023
- Apple Inc.
- Rohit Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing cache coherence directory bandwidth by aggregating victimi...
- Patent number 10,387,314
- Issue date Aug 20, 2019
- Oracle International Corporation
- Thomas Wicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power throttle mechanism with temperature sensing and activity feed...
- Patent number 9,625,983
- Issue date Apr 18, 2017
- Oracle International Corporation
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transfer of information within an ASIC using a slotted ring based p...
- Patent number 9,608,839
- Issue date Mar 28, 2017
- Oracle International Corporation
- Jurgen Schulz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Physical domain error isolation and recovery in a multi-domain system
- Patent number 9,256,500
- Issue date Feb 9, 2016
- Oracle International Corporation
- Jurgen M. Schulz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated test packet generation and diagnostics
- Patent number 8,873,421
- Issue date Oct 28, 2014
- Oracle International Corporation
- Jurgen M. Schulz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Generating a clock crossing signal based on clock ratios
- Patent number 7,627,065
- Issue date Dec 1, 2009
- Sun Microsystems, Inc.
- Jurgen M. Schulz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Error correction code transformation technique
- Patent number 7,480,847
- Issue date Jan 20, 2009
- Sun Microsystems, Inc.
- Jürgen M. Schulz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory system topology
- Patent number 7,350,048
- Issue date Mar 25, 2008
- Sun Microsystems, Inc.
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed event reporting hierarchy
- Patent number 7,346,813
- Issue date Mar 18, 2008
- Sun Microsystems, Inc.
- Jürgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Source synchronous bus repeater
- Patent number 7,139,308
- Issue date Nov 21, 2006
- Sun Microsystems, Inc.
- Drew G. Doblar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Computer system including a memory controller configured to perform...
- Patent number 7,055,016
- Issue date May 30, 2006
- Sun Microsystems, Inc.
- Andrew E. Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ibist identification loopback scheme
- Patent number 7,051,252
- Issue date May 23, 2006
- Sun Microsystems, Inc.
- Brian L. Smith
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Static scheduling of test cases
- Patent number 7,031,900
- Issue date Apr 18, 2006
- Sun Microsystems, Inc.
- Sridhar Vakada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed caching mechanism for pending memory operations within...
- Patent number 6,959,361
- Issue date Oct 25, 2005
- Sun Microsystems, Inc.
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System including a memory controller configured to perform pre-fetc...
- Patent number 6,959,374
- Issue date Oct 25, 2005
- Sun Microsystems, Inc.
- Jurgen Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-speed first-in-first-out buffer
- Patent number 6,802,036
- Issue date Oct 5, 2004
- Sun Microsystems, Inc.
- Kenneth Y. Chiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for loading data from an address specified by...
- Patent number 6,681,337
- Issue date Jan 20, 2004
- Sun Microsystems, Inc.
- Brian L. Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Module and connector having multiple contact rows
- Patent number 6,674,644
- Issue date Jan 6, 2004
- Sun Microsystems, Inc.
- Jurgen Schulz
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Digital process monitor
- Patent number 6,668,346
- Issue date Dec 23, 2003
- Sun Microsystems, Inc.
- Jurgen M. Schulz
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit having distributed control and status registers...
- Patent number 6,640,322
- Issue date Oct 28, 2003
- Sun Microsystems, Inc.
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock gating to reduce power consumption of control and status regi...
- Patent number 6,636,074
- Issue date Oct 21, 2003
- Sun Microsystems, Inc.
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data strobe receiver
- Patent number 6,512,704
- Issue date Jan 28, 2003
- Sun Microsystems, Inc.
- Chung-Hsiao R. Wu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data transfer with JTAG controller using index register to specipy...
- Patent number 6,314,486
- Issue date Nov 6, 2001
- Sun Microsystems, Inc.
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Dynamic Allocation of Cache Memory as RAM
- Publication number 20240126457
- Publication date Apr 18, 2024
- Apple Inc.
- Rohit Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic Allocation of Cache Memory as RAM
- Publication number 20230067307
- Publication date Mar 2, 2023
- Apple Inc.
- Rohit Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable Interface Circuit
- Publication number 20230064369
- Publication date Mar 2, 2023
- Apple Inc.
- Rohit K. Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Allocation of a Buffer Located in System Memory into a Cache Memory
- Publication number 20230062917
- Publication date Mar 2, 2023
- Apple Inc.
- Rohit Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING CACHE COHERENCY DIRECTORY BANDWIDTH BY AGGREGATING VICTIMI...
- Publication number 20170060745
- Publication date Mar 2, 2017
- Thomas Wicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSFER OF INFORMATION WITHIN AN ASIC USING A SLOTTED RING BASED P...
- Publication number 20160127147
- Publication date May 5, 2016
- ORACLE INTERNATIONAL CORPORATION
- Jurgen Schulz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
POWER THROTTLE MECHANISM WITH TEMPERATURE SENSING AND ACTIVITY FEED...
- Publication number 20160018884
- Publication date Jan 21, 2016
- Oracle International Corporation
- Jurgen M. SCHULZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICAL DOMAIN ERROR ISOLATION AND RECOVERY IN A MULTI-DOMAIN SYSTEM
- Publication number 20140310555
- Publication date Oct 16, 2014
- Oracle International Corporation
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED TEST PACKET GENERATION AND DIAGNOSTICS
- Publication number 20140204774
- Publication date Jul 24, 2014
- Oracle International Corporation
- Jurgen M. Schulz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Generating a clock crossing signal based on clock ratios
- Publication number 20070140394
- Publication date Jun 21, 2007
- Sun Microsystems, Inc.
- Jurgen M. Schulz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Error correction code transformation technique
- Publication number 20070050695
- Publication date Mar 1, 2007
- SUN MICROSYSTEMS, INC.
- Jurgen M. Schulz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Memory integrated circuit including an error detection mechanism fo...
- Publication number 20040237001
- Publication date Nov 25, 2004
- Sun Microsystems, Inc.
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer system including a memory controller configured to perform...
- Publication number 20040221111
- Publication date Nov 4, 2004
- Sun Microsystems, Inc.
- Andrew E. Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System including a memory controller configured to perform pre-fetc...
- Publication number 20040148470
- Publication date Jul 29, 2004
- Jurgen Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for accessing internal RAMs during diagnostic...
- Publication number 20040098643
- Publication date May 20, 2004
- Jurgen Schulz
- G11 - INFORMATION STORAGE
Information Patent Application
Memory subsystem including error correction
- Publication number 20040003165
- Publication date Jan 1, 2004
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Distributed caching mechanism for pending memory operations within...
- Publication number 20030204684
- Publication date Oct 30, 2003
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Source synchronous bus repeater
- Publication number 20030189973
- Publication date Oct 9, 2003
- Drew G. Doblar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
IBIST identification loopback scheme
- Publication number 20030159094
- Publication date Aug 21, 2003
- Brian L. Smith
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CLOCK GATING TO REDUCE POWER CONSUMPTION OF CONTROL AND STATUS REGI...
- Publication number 20030141901
- Publication date Jul 31, 2003
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High-speed first-in-first-out buffer
- Publication number 20030097526
- Publication date May 22, 2003
- Kenneth Y. Chiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Module and connector having multiple contact rows
- Publication number 20030081387
- Publication date May 1, 2003
- Jurgen Schulz
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Method for interleaving memory
- Publication number 20030046501
- Publication date Mar 6, 2003
- Jurgen M. Schulz
- G06 - COMPUTING CALCULATING COUNTING

Jurgen M. Schulz

Person

Patents Grantslast 30 patents

Allocation of a buffer located in system memory into a cache memory

Configurable interface circuit

Dynamic allocation of cache memory as RAM

Reducing cache coherence directory bandwidth by aggregating victimi...

Power throttle mechanism with temperature sensing and activity feed...

Transfer of information within an ASIC using a slotted ring based p...

Physical domain error isolation and recovery in a multi-domain system

Integrated test packet generation and diagnostics

Generating a clock crossing signal based on clock ratios

Error correction code transformation technique

Memory system topology

Distributed event reporting hierarchy

Source synchronous bus repeater

Computer system including a memory controller configured to perform...

Ibist identification loopback scheme

Static scheduling of test cases

Distributed caching mechanism for pending memory operations within...

System including a memory controller configured to perform pre-fetc...

High-speed first-in-first-out buffer

Method and apparatus for loading data from an address specified by...

Module and connector having multiple contact rows

Digital process monitor

Integrated circuit having distributed control and status registers...

Clock gating to reduce power consumption of control and status regi...

Data strobe receiver

Data transfer with JTAG controller using index register to specipy...

Patents Applicationslast 30 patents

Dynamic Allocation of Cache Memory as RAM

Dynamic Allocation of Cache Memory as RAM

Configurable Interface Circuit

Allocation of a Buffer Located in System Memory into a Cache Memory

REDUCING CACHE COHERENCY DIRECTORY BANDWIDTH BY AGGREGATING VICTIMI...

TRANSFER OF INFORMATION WITHIN AN ASIC USING A SLOTTED RING BASED P...

POWER THROTTLE MECHANISM WITH TEMPERATURE SENSING AND ACTIVITY FEED...

PHYSICAL DOMAIN ERROR ISOLATION AND RECOVERY IN A MULTI-DOMAIN SYSTEM

INTEGRATED TEST PACKET GENERATION AND DIAGNOSTICS

Generating a clock crossing signal based on clock ratios

Error correction code transformation technique

Memory integrated circuit including an error detection mechanism fo...

Computer system including a memory controller configured to perform...

System including a memory controller configured to perform pre-fetc...

Method and apparatus for accessing internal RAMs during diagnostic...

Memory subsystem including error correction

Distributed caching mechanism for pending memory operations within...

Source synchronous bus repeater

IBIST identification loopback scheme

CLOCK GATING TO REDUCE POWER CONSUMPTION OF CONTROL AND STATUS REGI...

High-speed first-in-first-out buffer

Module and connector having multiple contact rows

Method for interleaving memory