Jy-Der Tai

Person

Plano, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
First-in first-out memory
- Patent number 5,274,600
- Issue date Dec 28, 1993
- Texas Instruments Incorporated
- Morris D. Ward
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sequential memory
- Patent number 5,255,242
- Issue date Oct 19, 1993
- Texas Instruments Incorporated
- Morris D. Ward
- G11 - INFORMATION STORAGE
Information Patent Grant
Data access controller and method
- Patent number 5,249,154
- Issue date Sep 28, 1993
- Texas Instruments Incorporated
- Jy-Der Tai
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuitry and method for variable single transition counting
- Patent number 5,220,586
- Issue date Jun 15, 1993
- Texas Instruments Incorporated
- Jy-Der Tai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Look-ahead flag generator
- Patent number 5,021,994
- Issue date Jun 4, 1991
- Texas Instruments Incorporated
- Jy-Der Tai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for assigning priority to read and write requests received c...
- Patent number 4,933,901
- Issue date Jun 12, 1990
- Texas Instruments Incorporated
- Jy-Der Tai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture for memory multiplexing
- Patent number 4,837,743
- Issue date Jun 6, 1989
- Texas Instruments Incorporated
- Edison H. Chiu
- G11 - INFORMATION STORAGE
Information Patent Grant
Fast real-time arbiter
- Patent number 4,815,039
- Issue date Mar 21, 1989
- Texas Instruments Incorporated
- Jy-Der Tai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated FET circuit to reduce switching noise
- Patent number 4,789,793
- Issue date Dec 6, 1988
- Texas Instruments Incorporated
- George J. Ehni
- H03 - BASIC ELECTRONIC CIRCUITRY

Person

Patents Grantslast 30 patents

First-in first-out memory

Sequential memory

Data access controller and method

Circuitry and method for variable single transition counting

Look-ahead flag generator

Method for assigning priority to read and write requests received c...

Architecture for memory multiplexing

Fast real-time arbiter

Integrated FET circuit to reduce switching noise