Jyh-Cherng J. Tzeng

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Sunnyvale, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Process for reducing program disturbance in EEPROM arrays
- Patent number 5,215,934
- Issue date Jun 1, 1993
- Jyh-Cherng J. Tzeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional contactless non-volatile memory cell
- Patent number 5,111,270
- Issue date May 5, 1992
- Intel Corporation
- Jyh-Cherng J. Tzeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a three-dimensional memory cell with integral sele...
- Patent number 5,049,515
- Issue date Sep 17, 1991
- Intel Corporation, Inc.
- Jyh-Cherng J. Tzeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory cell with integral select transistor
- Patent number 4,964,080
- Issue date Oct 16, 1990
- Intel Corporation
- Jyh-Cherng J. Tzeng
- H01 - BASIC ELECTRIC ELEMENTS