Ka Kei Kwok

Person

Milpitas, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Reset verification
- Patent number 9,483,594
- Issue date Nov 1, 2016
- Mentor Graphics Corporation
- Ka-kei Kwok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical verification of clock domain crossings
- Patent number 9,117,044
- Issue date Aug 25, 2015
- Mentor Graphics Corporation
- Ka-Kei Kwok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metastability effects simulation for a circuit description
- Patent number 8,914,761
- Issue date Dec 16, 2014
- Mentor Graphics Corporation
- Tai An Ly
- G01 - MEASURING TESTING
Information Patent Grant
Hierarchical verification of clock domain crossings
- Patent number 8,819,599
- Issue date Aug 26, 2014
- Mentor Graphics Corporation
- Ka-Kei Kwok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metastability effects simulation for a circuit description
- Patent number 8,438,516
- Issue date May 7, 2013
- Mentor Graphics Corporation
- Tai An Ly
- G01 - MEASURING TESTING
Information Patent Grant
Formal verification of clock domain crossings
- Patent number 8,271,918
- Issue date Sep 18, 2012
- Mentor Graphics Corporation
- Ka-Kei Kwok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metastability effects simulation for a circuit description
- Patent number 7,712,062
- Issue date May 4, 2010
- Tai An Ly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metastability injector for a circuit description
- Patent number 7,454,728
- Issue date Nov 18, 2008
- Tai An Ly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metastability effects simulation for a circuit description
- Patent number 7,356,789
- Issue date Apr 8, 2008
- Tai An Ly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metastability injector for a circuit description
- Patent number 7,243,322
- Issue date Jul 10, 2007
- Tai An Ly
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
RESET VERIFICATION
- Publication number 20160063161
- Publication date Mar 3, 2016
- Mentor Graphics Corporation
- Ka-kei Kwok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hierarchical Verification Of Clock Domain Crossings
- Publication number 20150026654
- Publication date Jan 22, 2015
- Mentor Graphics Corporation
- Ka-Kei Kwok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METASTABILITY EFFECTS SIMULATION FOR A CIRCUIT DESCRIPTION
- Publication number 20130246985
- Publication date Sep 19, 2013
- Mentor Graphics Corporation
- Tai An Ly
- G01 - MEASURING TESTING
Information Patent Application
METASTABILITY EFFECTS SIMULATION FOR A CIRCUIT DESCRIPTION
- Publication number 20100287524
- Publication date Nov 11, 2010
- Tai An Ly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hierarchical Verification Of Clock Domain Crossings
- Publication number 20100242003
- Publication date Sep 23, 2010
- Ka-Kei Kwok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Formal Verification Of Clock Domain Crossings
- Publication number 20100199244
- Publication date Aug 5, 2010
- Ka-Kei Kwok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METASTABILITY EFFECTS SIMULATION FOR A CIRCUIT DESCRIPTION
- Publication number 20080134115
- Publication date Jun 5, 2008
- Mentor Graphics Corporation
- Tai An Ly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METASTABILITY INJECTOR FOR A CIRCUIT DESCRIPTION
- Publication number 20070230645
- Publication date Oct 4, 2007
- Mentor Graphics Corporation
- Tai An Ly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Metastability effects simulation for a circuit description
- Publication number 20050268265
- Publication date Dec 1, 2005
- Mentor Graphics Corporation
- Tai An Ly
- G06 - COMPUTING CALCULATING COUNTING

Ka Kei Kwok

Person

Patents Grantslast 30 patents

Reset verification

Hierarchical verification of clock domain crossings

Metastability effects simulation for a circuit description

Hierarchical verification of clock domain crossings

Metastability effects simulation for a circuit description

Formal verification of clock domain crossings

Metastability effects simulation for a circuit description

Metastability injector for a circuit description

Metastability effects simulation for a circuit description

Metastability injector for a circuit description

Patents Applicationslast 30 patents

RESET VERIFICATION

Hierarchical Verification Of Clock Domain Crossings

METASTABILITY EFFECTS SIMULATION FOR A CIRCUIT DESCRIPTION

METASTABILITY EFFECTS SIMULATION FOR A CIRCUIT DESCRIPTION

Hierarchical Verification Of Clock Domain Crossings

Formal Verification Of Clock Domain Crossings

METASTABILITY EFFECTS SIMULATION FOR A CIRCUIT DESCRIPTION

METASTABILITY INJECTOR FOR A CIRCUIT DESCRIPTION

Metastability effects simulation for a circuit description