Kai Cheng

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Apparatus and method for implementing a multi-level memory hierarchy
- Patent number 10,719,443
- Issue date Jul 21, 2020
- Intel Corporation
- Raj K. Ramanujan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for implementing a multi-level memory hierarchy
- Patent number 10,241,912
- Issue date Mar 26, 2019
- Intel Corporation
- Raj K. Ramanujan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for implementing a multi-level memory hierarchy
- Patent number 9,600,416
- Issue date Mar 21, 2017
- Intel Corporation
- Raj K. Ramanujan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for store durability and ordering in a persist...
- Patent number 9,423,959
- Issue date Aug 23, 2016
- Intel Corporation
- Subramanya R. Dulloor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for injecting errors into memory
- Patent number 9,405,646
- Issue date Aug 2, 2016
- Theodros Yigzaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error correcting code scheme utilizing reserved space
- Patent number 9,391,637
- Issue date Jul 12, 2016
- Intel Corporation
- Rajat Agrawal
- G11 - INFORMATION STORAGE
Information Patent Grant
Mechanism for achieving high memory reliability, availability and s...
- Patent number 9,229,828
- Issue date Jan 5, 2016
- Intel Corporation
- Dableena Das
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system for energy efficiency and energy cons...
- Patent number 9,141,166
- Issue date Sep 22, 2015
- Intel Corporation
- Krishnakanth V. Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for achieving high memory reliablity, availability and se...
- Patent number 8,914,704
- Issue date Dec 16, 2014
- Intel Corporation
- Debaleena Das
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Rank-specific cyclic redundancy check
- Patent number 8,745,464
- Issue date Jun 3, 2014
- Intel Corporation
- Ramesh Subashchandrabose
- G11 - INFORMATION STORAGE
Information Patent Grant
Scalable distributed memory and I/O multiprocessor system
- Patent number 8,745,306
- Issue date Jun 3, 2014
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rank-specific cyclic redundancy check
- Patent number 8,527,836
- Issue date Sep 3, 2013
- Intel Corporation
- Ramesh Subashchandrabose
- G11 - INFORMATION STORAGE
Information Patent Grant
Pseudo least recently used replacement/allocation scheme in request...
- Patent number 8,433,856
- Issue date Apr 30, 2013
- Intel Corporation
- Kai Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods and apparatuses for clock enable (CKE) coordination
- Patent number 8,429,367
- Issue date Apr 23, 2013
- Intel Corporation
- James W. Alexander
- G11 - INFORMATION STORAGE
Information Patent Grant
Scalable distributed memory and I/O multiprocessor system
- Patent number 8,255,605
- Issue date Aug 28, 2012
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Line swapping scheme to reduce back invalidations in a snoop filter
- Patent number 8,055,851
- Issue date Nov 8, 2011
- Intel Corporation
- Meenakshisundaram R. Chinthamani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing back invalidation transactions from a snoop filter
- Patent number 8,015,365
- Issue date Sep 6, 2011
- Intel Corporation
- Tsvika Kurts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing memory latency in a cache coheren...
- Patent number 7,996,625
- Issue date Aug 9, 2011
- Intel Corporation
- Manoj Khare
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-memory, in-page directory cache coherency scheme
- Patent number 7,991,963
- Issue date Aug 2, 2011
- Intel Corporation
- Ian M. Steiner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic updating of thresholds in accordance with operating conditons
- Patent number 7,984,250
- Issue date Jul 19, 2011
- Intel Corporation
- Robin Steinbrecher
- G11 - INFORMATION STORAGE
Information Patent Grant
Partial way hint line replacement algorithm for a snoop filter
- Patent number 7,962,694
- Issue date Jun 14, 2011
- Intel Corporation
- Meenakshisundaram R. Chinthamani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully buffered DIMM read data substitution for write acknowledgement
- Patent number 7,941,618
- Issue date May 10, 2011
- Intel Corporation
- James W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable memory and I/O multiprocessor systems
- Patent number 7,930,464
- Issue date Apr 19, 2011
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods and apparatuses for rank coordination
- Patent number 7,885,914
- Issue date Feb 8, 2011
- Intel Corporation
- James W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mitigating silent data corruption in a buffered memory module archi...
- Patent number 7,734,980
- Issue date Jun 8, 2010
- Intel Corporation
- James W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Silent data corruption mitigation using error correction code with...
- Patent number 7,644,347
- Issue date Jan 5, 2010
- Intel Corporation
- James W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable protocol to support coherent and non-coherent transact...
- Patent number 7,617,329
- Issue date Nov 10, 2009
- Intel Corporation
- Tuan M. Quach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable distributed memory and I/O multiprocessor systems and asso...
- Patent number 7,603,508
- Issue date Oct 13, 2009
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pseudo least recently used replacement/allocation scheme in request...
- Patent number 7,590,804
- Issue date Sep 15, 2009
- Intel Corporation
- Kai Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Exclusive ownership snoop filter
- Patent number 7,581,068
- Issue date Aug 25, 2009
- Intel Corporation
- Jeffrey D. Gilbert
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SELECTABLE PLATFORM POWER LIMITING TO ENABLE EFFICIENT PERSISTENT M...
- Publication number 20230229594
- Publication date Jul 20, 2023
- Intel Corporation
- Kai CHENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR IMPLEMENTING A MULTI-LEVEL MEMORY HIERARCHY
- Publication number 20190220406
- Publication date Jul 18, 2019
- Intel Corporation
- Raj K. RAMANUJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR IMPLEMENTING A MULTI-LEVEL MEMORY HIERARCHY
- Publication number 20170249250
- Publication date Aug 31, 2017
- Intel Corporation
- Raj K. RAMANUJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR INJECTING ERRORS INTO MEMORY
- Publication number 20160343453
- Publication date Nov 24, 2016
- Intel Corporation
- Theodros Yigzaw
- G11 - INFORMATION STORAGE
Information Patent Application
MECHANISM FOR ACHIEVING HIGH MEMORY RELIABLITY, AVAILABILITY AND SE...
- Publication number 20150220410
- Publication date Aug 6, 2015
- DABLEENA DAS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIMODAL FUNCTIONALITY BETWEEN COHERENT LINK AND MEMORY EXPANSION
- Publication number 20150058524
- Publication date Feb 26, 2015
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR STORE DURABILITY AND ORDERING IN A PERSIST...
- Publication number 20150006834
- Publication date Jan 1, 2015
- Subramanya R. DULLOOR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR CORRECTING CODE SCHEME UTILIZING RESERVED SPACE
- Publication number 20140229797
- Publication date Aug 14, 2014
- Rajat Agrawal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR IMPLEMENTING A MULTI-LEVEL MEMORY HIERARCHY
- Publication number 20140129767
- Publication date May 8, 2014
- Raj K Ramanujan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR ACHIEVING HIGH MEMORY RELIABLITY, AVAILABILITY AND SE...
- Publication number 20140006899
- Publication date Jan 2, 2014
- DEBALEENA DAS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RANK-SPECIFIC CYCLE REDUNDANCY CHECK
- Publication number 20130332795
- Publication date Dec 12, 2013
- Ramesh Subashchandrabose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR INJECTING ERRORS INTO MEMORY
- Publication number 20130275810
- Publication date Oct 17, 2013
- Theodros Yigzaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RANK-SPECIFIC CYCLIC REDUNDANCY CHECK
- Publication number 20130007560
- Publication date Jan 3, 2013
- Ramesh Subashchandrabose
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEM
- Publication number 20120317328
- Publication date Dec 13, 2012
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONS...
- Publication number 20120185706
- Publication date Jul 19, 2012
- Krishnakanth V. Sistla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEM
- Publication number 20110185101
- Publication date Jul 28, 2011
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic updating of thresholds in accordance with operating conditons
- Publication number 20100169585
- Publication date Jul 1, 2010
- Robin Steinbrecher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PSEUDO LEAST RECENTLY USED REPLACEMENT/ALLOCATION SCHEME IN REQUEST...
- Publication number 20100005248
- Publication date Jan 7, 2010
- Kai Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEMS AND ASSO...
- Publication number 20090319717
- Publication date Dec 24, 2009
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing back invalidation transactions from a snoop filter
- Publication number 20090300289
- Publication date Dec 3, 2009
- Tsvika Kurts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS AND APPARATUSES FOR RANK COORDINATION
- Publication number 20090171875
- Publication date Jul 2, 2009
- Intel Corporation
- James W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
In-memory, in-page directory cache coherency scheme
- Publication number 20090172295
- Publication date Jul 2, 2009
- Ian M. Steiner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS AND APPARATUSES FOR CLOCK ENABLE (CKE) COORDINATION
- Publication number 20090172681
- Publication date Jul 2, 2009
- Intel Corporation
- James W. Alexander
- G11 - INFORMATION STORAGE
Information Patent Application
FULLY BUFFERED DIMM READ DATA SUBSTITUTION FOR WRITE ACKNOWLEDGEMENT
- Publication number 20080320249
- Publication date Dec 25, 2008
- James W. Alexander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique and apparatus for combining partial write transactions
- Publication number 20080235461
- Publication date Sep 25, 2008
- Sin Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Line swapping scheme to reduce back invalidations in a snoop filter
- Publication number 20080147986
- Publication date Jun 19, 2008
- Sundaram Chinthamani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEMS AND ASSO...
- Publication number 20080114919
- Publication date May 15, 2008
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiprocessor system with private memory sections
- Publication number 20080109624
- Publication date May 8, 2008
- Jeffrey D. Gilbert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Exclusive ownership snoop filter
- Publication number 20080005485
- Publication date Jan 3, 2008
- Jeffrey D. Gilbert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preselecting E/M line replacement technique for a snoop filter
- Publication number 20070239941
- Publication date Oct 11, 2007
- Lily P. Looi
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Apparatus and method for implementing a multi-level memory hierarchy

Apparatus and method for implementing a multi-level memory hierarchy

Apparatus and method for implementing a multi-level memory hierarchy

Method and apparatus for store durability and ordering in a persist...

Method and apparatus for injecting errors into memory

Error correcting code scheme utilizing reserved space

Mechanism for achieving high memory reliability, availability and s...

Method, apparatus, and system for energy efficiency and energy cons...

Mechanism for achieving high memory reliablity, availability and se...

Rank-specific cyclic redundancy check

Scalable distributed memory and I/O multiprocessor system

Rank-specific cyclic redundancy check

Pseudo least recently used replacement/allocation scheme in request...

Systems, methods and apparatuses for clock enable (CKE) coordination

Scalable distributed memory and I/O multiprocessor system

Line swapping scheme to reduce back invalidations in a snoop filter

Reducing back invalidation transactions from a snoop filter

Method and apparatus for reducing memory latency in a cache coheren...

In-memory, in-page directory cache coherency scheme

Dynamic updating of thresholds in accordance with operating conditons

Partial way hint line replacement algorithm for a snoop filter

Fully buffered DIMM read data substitution for write acknowledgement

Scalable memory and I/O multiprocessor systems

Systems, methods and apparatuses for rank coordination

Mitigating silent data corruption in a buffered memory module archi...

Silent data corruption mitigation using error correction code with...

Programmable protocol to support coherent and non-coherent transact...

Scalable distributed memory and I/O multiprocessor systems and asso...

Pseudo least recently used replacement/allocation scheme in request...

Exclusive ownership snoop filter

Patents Applicationslast 30 patents

SELECTABLE PLATFORM POWER LIMITING TO ENABLE EFFICIENT PERSISTENT M...

APPARATUS AND METHOD FOR IMPLEMENTING A MULTI-LEVEL MEMORY HIERARCHY

APPARATUS AND METHOD FOR IMPLEMENTING A MULTI-LEVEL MEMORY HIERARCHY

METHOD AND APPARATUS FOR INJECTING ERRORS INTO MEMORY

MECHANISM FOR ACHIEVING HIGH MEMORY RELIABLITY, AVAILABILITY AND SE...

BIMODAL FUNCTIONALITY BETWEEN COHERENT LINK AND MEMORY EXPANSION

METHOD AND APPARATUS FOR STORE DURABILITY AND ORDERING IN A PERSIST...

ERROR CORRECTING CODE SCHEME UTILIZING RESERVED SPACE

APPARATUS AND METHOD FOR IMPLEMENTING A MULTI-LEVEL MEMORY HIERARCHY

MECHANISM FOR ACHIEVING HIGH MEMORY RELIABLITY, AVAILABILITY AND SE...

RANK-SPECIFIC CYCLE REDUNDANCY CHECK

METHOD AND APPARATUS FOR INJECTING ERRORS INTO MEMORY

RANK-SPECIFIC CYCLIC REDUNDANCY CHECK

SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEM

METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONS...

SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEM

Dynamic updating of thresholds in accordance with operating conditons

PSEUDO LEAST RECENTLY USED REPLACEMENT/ALLOCATION SCHEME IN REQUEST...

SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEMS AND ASSO...

Reducing back invalidation transactions from a snoop filter

SYSTEMS, METHODS AND APPARATUSES FOR RANK COORDINATION

In-memory, in-page directory cache coherency scheme

SYSTEMS, METHODS AND APPARATUSES FOR CLOCK ENABLE (CKE) COORDINATION

FULLY BUFFERED DIMM READ DATA SUBSTITUTION FOR WRITE ACKNOWLEDGEMENT

Technique and apparatus for combining partial write transactions

Line swapping scheme to reduce back invalidations in a snoop filter

SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEMS AND ASSO...

Multiprocessor system with private memory sections

Exclusive ownership snoop filter

Preselecting E/M line replacement technique for a snoop filter