Kai Loon Cheong

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Non-planar integrated circuit structures having mitigated source or...
- Patent number 12,302,632
- Issue date May 13, 2025
- Intel Corporation
- Jun Sung Kang
Information Patent Grant
Non-planar integrated circuit structures having mitigated source or...
- Patent number 11,869,891
- Issue date Jan 9, 2024
- Intel Corporation
- Jun Sung Kang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nanowire transistor structure and method of shaping
- Patent number 11,869,973
- Issue date Jan 9, 2024
- Intel Corporation
- Erica J. Thompson
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
STACKED CMOS TRANSISTOR STRUCTURES WITH COMPLEMENTARY CHANNEL MATER...
- Publication number 20250006737
- Publication date Jan 2, 2025
- Intel Corporation
- Aryan Navabi-Shirazi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE CONTACT ETCH BEFORE CAVITY SPACER FORMATION FOR BACKSIDE C...
- Publication number 20240332379
- Publication date Oct 3, 2024
- Intel Corporation
- Shaun Mills
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-PLANAR INTEGRATED CIRCUIT STRUCTURES HAVING MITIGATED SOURCE OR...
- Publication number 20240096896
- Publication date Mar 21, 2024
- Intel Corporation
- Jun Sung KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE TRANSISTOR STRUCTURE AND METHOD OF SHAPING
- Publication number 20240088296
- Publication date Mar 14, 2024
- Intel Corporation
- Erica J. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE SPACER IN STACKED GATE-ALL-AROUND (GAA) DEVICE ARCHITECTURE
- Publication number 20240006499
- Publication date Jan 4, 2024
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE REMOVAL OF CHANNEL BODIES IN STACKED GATE-ALL-AROUND (GAA...
- Publication number 20230395678
- Publication date Dec 7, 2023
- Intel Corporation
- Munzarin F. Qayyum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL TO SOURCE/DRAIN CONTACT AREA USING THIN NUCLEATION LAYER AND...
- Publication number 20200161440
- Publication date May 21, 2020
- Intel Corporation
- Ritesh Jhaveri
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-PLANAR INTEGRATED CIRCUIT STRUCTURES HAVING MITIGATED SOURCE OR...
- Publication number 20200105757
- Publication date Apr 2, 2020
- Intel Corporation
- Jun Sung KANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NANOWIRE TRANSISTOR STRUCTURE AND METHOD OF SHAPING
- Publication number 20190393350
- Publication date Dec 26, 2019
- Intel Corporation
- Erica J. Thompson
- H01 - BASIC ELECTRIC ELEMENTS

Kai Loon Cheong

Person

Patents Grantslast 30 patents

Non-planar integrated circuit structures having mitigated source or...

Non-planar integrated circuit structures having mitigated source or...

Nanowire transistor structure and method of shaping

Patents Applicationslast 30 patents

STACKED CMOS TRANSISTOR STRUCTURES WITH COMPLEMENTARY CHANNEL MATER...

BACKSIDE CONTACT ETCH BEFORE CAVITY SPACER FORMATION FOR BACKSIDE C...

NON-PLANAR INTEGRATED CIRCUIT STRUCTURES HAVING MITIGATED SOURCE OR...

NANOWIRE TRANSISTOR STRUCTURE AND METHOD OF SHAPING

GATE SPACER IN STACKED GATE-ALL-AROUND (GAA) DEVICE ARCHITECTURE

SELECTIVE REMOVAL OF CHANNEL BODIES IN STACKED GATE-ALL-AROUND (GAA...

METAL TO SOURCE/DRAIN CONTACT AREA USING THIN NUCLEATION LAYER AND...

NON-PLANAR INTEGRATED CIRCUIT STRUCTURES HAVING MITIGATED SOURCE OR...

NANOWIRE TRANSISTOR STRUCTURE AND METHOD OF SHAPING