Kalipatnam Vivek Rao

Person

Grafton, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method for making DRAM with recessed channel array transistor (RCAT...
- Patent number 10,636,879
- Issue date Apr 28, 2020
- ATOMERA INCORPORATED
- Kalipatnam Vivek Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with recessed channel array transistor (RCAT)...
- Patent number 10,367,064
- Issue date Jul 30, 2019
- ATOMERA INCORPORATED
- Kalipatnam Vivek Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including a metal-to-semiconductor superlattic...
- Patent number 7,928,425
- Issue date Apr 19, 2011
- MEARS Technologies, Inc.
- Kalipatnam Vivek Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device including shallow trench i...
- Patent number 7,812,339
- Issue date Oct 12, 2010
- MEARS Technologies, Inc.
- Robert J. Mears
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with a vertical MOSFET including a superlattic...
- Patent number 7,781,827
- Issue date Aug 24, 2010
- MEARS Technologies, Inc.
- Kalipatnam Vivek Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including a floating gate memory cell with a s...
- Patent number 7,659,539
- Issue date Feb 9, 2010
- MEARS Technologies, Inc.
- Scott A. Kreps
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having a semiconductor-on-insulator configurat...
- Patent number 7,586,116
- Issue date Sep 8, 2009
- MEARS Technologies, Inc.
- Scott A. Kreps
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device including shallow trench i...
- Patent number 7,514,328
- Issue date Apr 7, 2009
- MEARS Technologies, Inc.
- Kalipatnam Vivek Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device having a semiconductor-on-...
- Patent number 7,491,587
- Issue date Feb 17, 2009
- MEARS Technologies, Inc.
- Kalipatnam Vivek Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a semiconductor device comprising a superlattice...
- Patent number 7,446,002
- Issue date Nov 4, 2008
- MEARS Technologies, Inc.
- Robert J. Mears
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FINFET including a superlattice
- Patent number 7,202,494
- Issue date Apr 10, 2007
- RJ Mears, LLC
- Richard A. Blanchard
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR MAKING DRAM WITH RECESSED CHANNEL ARRAY TRANSISTOR (RCAT...
- Publication number 20180358361
- Publication date Dec 13, 2018
- ATOMERA INCORPORATED
- KALIPATNAM VIVEK RAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH RECESSED CHANNEL ARRAY TRANSISTOR (RCAT)...
- Publication number 20180358442
- Publication date Dec 13, 2018
- ATOMERA INCORPORATED
- KALIPATNAM VIVEK RAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES FOR ION IMPLANTATION OF NARROW SEMICONDUCTOR STRUCTURES
- Publication number 20150214339
- Publication date Jul 30, 2015
- Varian Semiconductor Equipment Associates, Inc.
- ANDREW M. WAITE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND DOPANT DIFFUSION...
- Publication number 20110215299
- Publication date Sep 8, 2011
- MEARS Technologies, Inc.
- KALIPATNAM RAO
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING SHALLOW TRENCH I...
- Publication number 20080258134
- Publication date Oct 23, 2008
- MEARS Technologies, Inc.
- Robert J. Mears
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A METAL-TO-SEMICONDUCTOR SUPERLATTIC...
- Publication number 20080179588
- Publication date Jul 31, 2008
- MEARS Technologies, Inc.
- Kalipatnam Vivek Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE WITH A VERTICAL MOSFET INCLUDING A SUPERLATTIC...
- Publication number 20080179664
- Publication date Jul 31, 2008
- MEARS Technologies, Inc.
- Kalipatnam Vivek Rao
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method for making a semiconductor device including a front side str...
- Publication number 20070063186
- Publication date Mar 22, 2007
- RJ Mears, LLC.
- Kalipatnam Vivek Rao
- B82 - NANO-TECHNOLOGY
Information Patent Application
Semiconductor device including a front side strained superlattice l...
- Publication number 20070063185
- Publication date Mar 22, 2007
- RJ Mears, LLC.
- Kalipatnam Vivek Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FINFET Including a Superlattice
- Publication number 20060292889
- Publication date Dec 28, 2006
- RJ Mears, LLC.
- Richard A. Blanchard
- B82 - NANO-TECHNOLOGY
Information Patent Application
Method for Making a FINFET Including a Superlattice
- Publication number 20060292765
- Publication date Dec 28, 2006
- RJ Mears, LLC.
- Richard A. Blanchard
- B82 - NANO-TECHNOLOGY
Information Patent Application
Semiconductor Device Having a Semiconductor-on-Insulator (SOI) Conf...
- Publication number 20060289049
- Publication date Dec 28, 2006
- RJ Mears, LLC.
- Kalipatnam Vivek Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Making a Semiconductor Device Having a Semiconductor-on-...
- Publication number 20060292818
- Publication date Dec 28, 2006
- RJ Mears, LLC.
- Kalipatnam Vivek Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device Including Shallow Trench Isolation (STI) Regio...
- Publication number 20060267130
- Publication date Nov 30, 2006
- RJ Mears, LLC.
- Kalipatnam Vivek Rao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Making a Semiconductor Device Including Shallow Trench I...
- Publication number 20060270169
- Publication date Nov 30, 2006
- RJ Mears, LLC.
- Kalipatnam Vivek Rao
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING A FLOATING GATE...
- Publication number 20060263980
- Publication date Nov 23, 2006
- RJ Mears, LLC, State of Incorporation: Delaware
- Scott A. Kreps
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR-ON-INSULATOR CONFIGURAT...
- Publication number 20060261327
- Publication date Nov 23, 2006
- RJ Mears, LLC.
- Scott A. Kreps
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING A FLOATING GATE MEMORY CELL WITH A S...
- Publication number 20060243963
- Publication date Nov 2, 2006
- RJ Mears, LLC.
- Scott A. Kreps
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MAKING A SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR-ON-...
- Publication number 20060243964
- Publication date Nov 2, 2006
- RJ Mears, LLC.
- Scott A. Kreps
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for making a semiconductor device comprising a superlattice...
- Publication number 20060019454
- Publication date Jan 26, 2006
- RJ Mears, LLC.
- Robert J. Mears
- B82 - NANO-TECHNOLOGY
Information Patent Application
Semiconductor device comprising a superlattice dielectric interface...
- Publication number 20060011905
- Publication date Jan 19, 2006
- RJ Mears, LLC.
- Robert J. Mears
- B82 - NANO-TECHNOLOGY

Kalipatnam Vivek Rao

Person

Patents Grantslast 30 patents

Method for making DRAM with recessed channel array transistor (RCAT...

Semiconductor device with recessed channel array transistor (RCAT)...

Semiconductor device including a metal-to-semiconductor superlattic...

Method for making a semiconductor device including shallow trench i...

Semiconductor device with a vertical MOSFET including a superlattic...

Semiconductor device including a floating gate memory cell with a s...

Semiconductor device having a semiconductor-on-insulator configurat...

Method for making a semiconductor device including shallow trench i...

Method for making a semiconductor device having a semiconductor-on-...

Method for making a semiconductor device comprising a superlattice...

FINFET including a superlattice

Patents Applicationslast 30 patents

METHOD FOR MAKING DRAM WITH RECESSED CHANNEL ARRAY TRANSISTOR (RCAT...

SEMICONDUCTOR DEVICE WITH RECESSED CHANNEL ARRAY TRANSISTOR (RCAT)...

TECHNIQUES FOR ION IMPLANTATION OF NARROW SEMICONDUCTOR STRUCTURES

SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND DOPANT DIFFUSION...

METHOD FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING SHALLOW TRENCH I...

SEMICONDUCTOR DEVICE INCLUDING A METAL-TO-SEMICONDUCTOR SUPERLATTIC...

SEMICONDUCTOR DEVICE WITH A VERTICAL MOSFET INCLUDING A SUPERLATTIC...

Method for making a semiconductor device including a front side str...

Semiconductor device including a front side strained superlattice l...

FINFET Including a Superlattice

Method for Making a FINFET Including a Superlattice

Semiconductor Device Having a Semiconductor-on-Insulator (SOI) Conf...

Method for Making a Semiconductor Device Having a Semiconductor-on-...

Semiconductor Device Including Shallow Trench Isolation (STI) Regio...

Method for Making a Semiconductor Device Including Shallow Trench I...

METHOD FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING A FLOATING GATE...

SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR-ON-INSULATOR CONFIGURAT...

SEMICONDUCTOR DEVICE INCLUDING A FLOATING GATE MEMORY CELL WITH A S...

METHOD FOR MAKING A SEMICONDUCTOR DEVICE HAVING A SEMICONDUCTOR-ON-...

Method for making a semiconductor device comprising a superlattice...

Semiconductor device comprising a superlattice dielectric interface...