Kalyan Chakravarthy C. Kavalipurapu

Person

Hyderabad, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Managing sub-block erase operations in a memory sub-system
- Patent number 12,068,037
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asymmetric plane driver circuits in a multi-plane memory device
- Patent number 11,861,236
- Issue date Jan 2, 2024
- Micron Technology, Inc.
- Kalyan Chakravarthy C. Kavalipurapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed compaction of logical states to reduce program time
- Patent number 11,791,003
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G11 - INFORMATION STORAGE
Information Patent Grant
Managing sub-block erase operations in a memory sub-system
- Patent number 11,749,353
- Issue date Sep 5, 2023
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Charge loss compensation
- Patent number 11,682,462
- Issue date Jun 20, 2023
- Micron Technology, Inc.
- Kalyan Chakravarthy C. Kavalipurapu
- G11 - INFORMATION STORAGE
Information Patent Grant
Peak current management in a memory array
- Patent number 11,495,306
- Issue date Nov 8, 2022
- Micron Technology, Inc.
- Michele Piccardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Distributed compaction of logical states to reduce program time
- Patent number 11,488,677
- Issue date Nov 1, 2022
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G11 - INFORMATION STORAGE
Information Patent Grant
Asymmetric plane driver circuits in a multi-plane memory device
- Patent number 11,354,067
- Issue date Jun 7, 2022
- Micron Technology, Inc.
- Kalyan Chakravarthy C. Kavalipurapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing sub-block erase operations in a memory sub-system
- Patent number 11,335,412
- Issue date May 17, 2022
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Charge loss compensation
- Patent number 11,081,189
- Issue date Aug 3, 2021
- Micron Technology, Inc.
- Kalyan Chakravarthy C. Kavalipurapu
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICES INCLUDING LOGIC NON-VOLATILE MEMORY
- Publication number 20240070059
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Vikas Rana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING SUB-BLOCK ERASE OPERATIONS IN A MEMORY SUB-SYSTEM
- Publication number 20230360709
- Publication date Nov 9, 2023
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS HAVING SEGMENTED DATA LINES AND METHODS OF THEIR OPERATION
- Publication number 20230325085
- Publication date Oct 12, 2023
- Micron Technology, Inc.
- Vikas Rana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED COMPACTION OF LOGICAL STATES TO REDUCE PROGRAM TIME
- Publication number 20230022858
- Publication date Jan 26, 2023
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING SUB-BLOCK ERASE OPERATIONS IN A MEMORY SUB-SYSTEM
- Publication number 20220277795
- Publication date Sep 1, 2022
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYMMETRIC PLANE DRIVER CIRCUITS IN A MULTI-PLANE MEMORY DEVICE
- Publication number 20220276806
- Publication date Sep 1, 2022
- Micron Technology, Inc.
- Kalyan Chakravarthy C. Kavalipurapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED COMPACTION OF LOGICAL STATES TO REDUCE PROGRAM TIME
- Publication number 20220189570
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G11 - INFORMATION STORAGE
Information Patent Application
ASYMMETRIC PLANE DRIVER CIRCUITS IN A MULTI-PLANE MEMORY DEVICE
- Publication number 20220043597
- Publication date Feb 10, 2022
- Micron Technology, Inc.
- Kalyan Chakravarthy C. Kavalipurapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHARGE LOSS COMPENSATION
- Publication number 20210358556
- Publication date Nov 18, 2021
- Micron Technology, Inc.
- Kalyan Chakravarthy C. Kavalipurapu
- G11 - INFORMATION STORAGE
Information Patent Application
CHARGE LOSS COMPENSATION
- Publication number 20210264988
- Publication date Aug 26, 2021
- Micron Technology, Inc.
- Kalyan Chakravarthy C. Kavalipurapu
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING SUB-BLOCK ERASE OPERATIONS IN A MEMORY SUB-SYSTEM
- Publication number 20210202009
- Publication date Jul 1, 2021
- Micron Technology, Inc.
- Kalyan Chakravarthy Kavalipurapu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PEAK CURRENT MANAGEMENT IN A MEMORY ARRAY
- Publication number 20210166770
- Publication date Jun 3, 2021
- Micron Technology, Inc.
- Michele Piccardi
- G11 - INFORMATION STORAGE

Kalyan Chakravarthy C. Kavalipurapu

Person

Patents Grantslast 30 patents

Managing sub-block erase operations in a memory sub-system

Asymmetric plane driver circuits in a multi-plane memory device

Distributed compaction of logical states to reduce program time

Managing sub-block erase operations in a memory sub-system

Charge loss compensation

Peak current management in a memory array

Distributed compaction of logical states to reduce program time

Asymmetric plane driver circuits in a multi-plane memory device

Managing sub-block erase operations in a memory sub-system

Charge loss compensation

Patents Applicationslast 30 patents

MEMORY DEVICES INCLUDING LOGIC NON-VOLATILE MEMORY

MANAGING SUB-BLOCK ERASE OPERATIONS IN A MEMORY SUB-SYSTEM

APPARATUS HAVING SEGMENTED DATA LINES AND METHODS OF THEIR OPERATION

DISTRIBUTED COMPACTION OF LOGICAL STATES TO REDUCE PROGRAM TIME

MANAGING SUB-BLOCK ERASE OPERATIONS IN A MEMORY SUB-SYSTEM

ASYMMETRIC PLANE DRIVER CIRCUITS IN A MULTI-PLANE MEMORY DEVICE

DISTRIBUTED COMPACTION OF LOGICAL STATES TO REDUCE PROGRAM TIME

ASYMMETRIC PLANE DRIVER CIRCUITS IN A MULTI-PLANE MEMORY DEVICE

CHARGE LOSS COMPENSATION

CHARGE LOSS COMPENSATION

MANAGING SUB-BLOCK ERASE OPERATIONS IN A MEMORY SUB-SYSTEM

PEAK CURRENT MANAGEMENT IN A MEMORY ARRAY