Kang Zhao

Person

Shanghai, CN

People

Patents Grantslast 30 patents

Information Patent Grant
DRC test pattern generation method and apparatus, electronic device...
- Patent number 12,361,196
- Issue date Jul 15, 2025
- CHANGXI MEMORY TECHNOLOGIES, INC.
- Chuanjiang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit design method and apparatus
- Patent number 12,242,791
- Issue date Mar 4, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Chuanjiang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for checking DFT circuit, test platform, storage medium and...
- Patent number 12,174,250
- Issue date Dec 24, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Teng Shi
- G01 - MEASURING TESTING
Information Patent Grant
Layout method and layout apparatus for integrated circuit
- Patent number 12,164,852
- Issue date Dec 10, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Chuanjiang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for obtaining circuit noise parameters and electronic device
- Patent number 12,087,385
- Issue date Sep 10, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Kang Zhao
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for adjusting metal wiring density
- Patent number 11,989,499
- Issue date May 21, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Chuanjiang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Check tool and check method for design rule check rule deck of inte...
- Patent number 11,983,480
- Issue date May 14, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Chuanjiang Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit simulation test method and apparatus, device, and medium
- Patent number 11,846,674
- Issue date Dec 19, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR CHECKING DFT CIRCUIT, TEST PLATFORM, STORAGE MEDIUM AND...
- Publication number 20230358805
- Publication date Nov 9, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Teng SHI
- G01 - MEASURING TESTING
Information Patent Application
ANALYSIS SYSTEM AND METHOD FOR SIGNAL EYE DIAGRAMS
- Publication number 20230281894
- Publication date Sep 7, 2023
- CHANGXIN MEMORY TECHOLOGIES, INC.
- Kang ZHAO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LAYOUT REPAIRING METHOD AND APPARATUS, COMPUTER DEVICE, AND STORAGE...
- Publication number 20230061135
- Publication date Mar 2, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Chuanjiang CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRC TEST PATTERN GENERATION METHOD AND APPARATUS, ELECTRONIC DEVICE...
- Publication number 20230055464
- Publication date Feb 23, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Chuanjiang CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT SIMULATION TEST METHOD AND APPARATUS, DEVICE, AND MEDIUM
- Publication number 20230032066
- Publication date Feb 2, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Feng Lin
- G01 - MEASURING TESTING
Information Patent Application
METHOD FOR OBTAINING CIRCUIT NOISE PARAMETERS AND ELECTRONIC DEVICE
- Publication number 20230013029
- Publication date Jan 19, 2023
- Changxin Memory Technologies, Inc.
- Kang ZHAO
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR ADJUSTING METAL WIRING DENSITY
- Publication number 20230014017
- Publication date Jan 19, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Chuanjiang CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS OF DESIGNING INTEGRATED CIRCUIT
- Publication number 20230010661
- Publication date Jan 12, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Chuanjiang CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN METHOD AND APPARATUS
- Publication number 20230010293
- Publication date Jan 12, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Chuanjiang CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK EVALUATION
- Publication number 20220405545
- Publication date Dec 22, 2022
- NVIDIA Corporation
- Kang Zhao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LAYOUT METHOD AND LAYOUT APPARATUS FOR INTEGRATED CIRCUIT
- Publication number 20220147686
- Publication date May 12, 2022
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Chuanjiang CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CHECK TOOL AND CHECK METHOD FOR DESIGN RULE CHECK RULE DECK OF INTE...
- Publication number 20210383053
- Publication date Dec 9, 2021
- Changxin Memory Technologies, Inc.
- Chuanjiang Chen
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

DRC test pattern generation method and apparatus, electronic device...

Semiconductor integrated circuit design method and apparatus

Method for checking DFT circuit, test platform, storage medium and...

Layout method and layout apparatus for integrated circuit

Method for obtaining circuit noise parameters and electronic device

Method and apparatus for adjusting metal wiring density

Check tool and check method for design rule check rule deck of inte...

Circuit simulation test method and apparatus, device, and medium

Patents Applicationslast 30 patents

METHOD FOR CHECKING DFT CIRCUIT, TEST PLATFORM, STORAGE MEDIUM AND...

ANALYSIS SYSTEM AND METHOD FOR SIGNAL EYE DIAGRAMS

LAYOUT REPAIRING METHOD AND APPARATUS, COMPUTER DEVICE, AND STORAGE...

DRC TEST PATTERN GENERATION METHOD AND APPARATUS, ELECTRONIC DEVICE...

CIRCUIT SIMULATION TEST METHOD AND APPARATUS, DEVICE, AND MEDIUM

METHOD FOR OBTAINING CIRCUIT NOISE PARAMETERS AND ELECTRONIC DEVICE

METHOD AND APPARATUS FOR ADJUSTING METAL WIRING DENSITY

METHOD AND APPARATUS OF DESIGNING INTEGRATED CIRCUIT

SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN METHOD AND APPARATUS

NEURAL NETWORK EVALUATION

LAYOUT METHOD AND LAYOUT APPARATUS FOR INTEGRATED CIRCUIT

CHECK TOOL AND CHECK METHOD FOR DESIGN RULE CHECK RULE DECK OF INTE...