Kapila B. Udawatta

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San Diego, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Test, validation, and debug architecture
- Patent number 10,198,333
- Issue date Feb 5, 2019
- Intel Corporation
- Mark B. Trobough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for fault tolerant and flexible test signature...
- Patent number 6,738,939
- Issue date May 18, 2004
- Intel Corporation
- Kapila B. Udawatta
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus to enhance testability of logic coupled to IO...
- Patent number 6,650,136
- Issue date Nov 18, 2003
- Intel Corporation
- Anthony Babella
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
TEST, VALIDATION, AND DEBUG ARCHITECTURE
- Publication number 20150127983
- Publication date May 7, 2015
- Intel Corporation
- Mark B. Trobough
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for fault tolerant and flexible test signature...
- Publication number 20020174393
- Publication date Nov 21, 2002
- Kapila B. Udawatta
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus to enhance testability of logic coupled to IO...
- Publication number 20020113614
- Publication date Aug 22, 2002
- Anthony Babella
- G01 - MEASURING TESTING