Karim Abdalla

Person

Menlo Park, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Distributed index fetch, primitive assembly, and primitive batching
- Patent number 10,332,310
- Issue date Jun 25, 2019
- NVIDIA Corporation
- Niket Agrawal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method, and computer program product for simultaneous execu...
- Patent number 10,217,183
- Issue date Feb 26, 2019
- NVIDIA Corporation
- Gregory S. Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controlling work distribution for processing tasks
- Patent number 9,921,873
- Issue date Mar 20, 2018
- NVIDIA Corporation
- Lacky V. Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heuristics for improving performance in a tile based architecture
- Patent number 9,792,122
- Issue date Oct 17, 2017
- NVIDIA Corporation
- Ziyad S. Hakura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Execution state analysis for assigning tasks to streaming multiproc...
- Patent number 9,715,413
- Issue date Jul 25, 2017
- NVIDIA Corporation
- Karim M. Abdalla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for auto-throttling encapsulated compute tasks
- Patent number 9,710,306
- Issue date Jul 18, 2017
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for managing graphics processing resources in a tile-bas...
- Patent number 9,639,366
- Issue date May 2, 2017
- NVIDIA Corporation
- Karim M. Abdalla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for distributing work batches to processing units...
- Patent number 9,594,599
- Issue date Mar 14, 2017
- NVIDIA Corporation
- Philip Browning Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute work distribution reference counters
- Patent number 9,507,638
- Issue date Nov 29, 2016
- NVIDIA Corporation
- Philip Alexander Cuadra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Time slice processing of tessellation and geometry shaders
- Patent number 9,436,969
- Issue date Sep 6, 2016
- NVIDIA Corporation
- Ziyad S. Hakura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scheduling and execution of compute tasks
- Patent number 9,069,609
- Issue date Jun 30, 2015
- NVIDIA Corporation
- Karim M. Abdalla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signaling, ordering, and execution of dynamically generated tasks i...
- Patent number 8,984,183
- Issue date Mar 17, 2015
- NVIDIA Corporation
- Timothy John Purcell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redistribution of generated geometric primitives
- Patent number 8,917,271
- Issue date Dec 23, 2014
- NVIDIA Corporation
- Johnny S. Rhoades
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block linear memory ordering of texture data techniques
- Patent number 8,456,481
- Issue date Jun 4, 2013
- NVIDIA Corporation
- Walter E. Donovan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block linear memory ordering of texture data
- Patent number 8,436,868
- Issue date May 7, 2013
- NVIDIA Corporation
- Walter E. Donovan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation of register-combiner state into shader microcode
- Patent number 8,223,150
- Issue date Jul 17, 2012
- NVIDIA Corporation
- Brian Cabral
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation of register-combiner state into shader microcode
- Patent number 8,004,523
- Issue date Aug 23, 2011
- NVIDIA Corporation
- Brian Cabral
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block linear memory ordering of texture data
- Patent number 7,916,149
- Issue date Mar 29, 2011
- NVIDIA Corporation
- Walter E. Donovan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable high-performance texture pipeline with advanced filt...
- Patent number 7,884,831
- Issue date Feb 8, 2011
- NVIDIA Corporation
- Alexander L. Minkin
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Scalable shader architecture
- Patent number 7,852,340
- Issue date Dec 14, 2010
- NVIDIA Corporation
- Rui M. Bastos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fragment processor having dual mode register file
- Patent number 7,821,520
- Issue date Oct 26, 2010
- NVIDIA Corporation
- Rui M. Bastos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Functional block level clock-gating within a graphics processor
- Patent number 7,802,118
- Issue date Sep 21, 2010
- NVIDIA Corporation
- Karim M. Abdalla
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Automatic functional block level clock-gating
- Patent number 7,797,561
- Issue date Sep 14, 2010
- NVIDIA Corporation
- Karim M. Abdalla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable high performance texture pipeline with advanced filt...
- Patent number 7,649,538
- Issue date Jan 19, 2010
- NVIDIA Corporation
- Alexander L. Minkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pixel center position displacement
- Patent number 7,576,751
- Issue date Aug 18, 2009
- NVIDIA Corporation
- Rui M. Bastos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Subpicture overlay using fragment shader
- Patent number 7,542,042
- Issue date Jun 2, 2009
- NVIDIA Corporation
- Roger L. Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture for compact multi-ported register file
- Patent number 7,490,208
- Issue date Feb 10, 2009
- NVIDIA Corporation
- Lordson Yue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pixel center position displacement
- Patent number 7,425,966
- Issue date Sep 16, 2008
- NVIDIA Corporation
- Rui M. Bastos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable shader architecture
- Patent number 7,385,607
- Issue date Jun 10, 2008
- NVIDIA Corporation
- Rui M. Bastos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management system having a forward progress bit
- Patent number 7,369,135
- Issue date May 6, 2008
- NVIDIA Corporation
- Karim M. Abdalla
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DISTRIBUTED INDEX FETCH, PRIMITIVE ASSEMBLY, AND PRIMITIVE BATCHING
- Publication number 20170178401
- Publication date Jun 22, 2017
- NVIDIA Corporation
- Niket Agrawal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR SIMULTANEOUS EXECU...
- Publication number 20150178879
- Publication date Jun 25, 2015
- NVIDIA Corporation
- Gregory S. Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR MANAGING GRAPHICS PROCESSING RESOURCES IN A TILE-BAS...
- Publication number 20140118375
- Publication date May 1, 2014
- NVIDIA Corporation
- Karim M. ABDALLA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HEURISTICS FOR IMPROVING PERFORMANCE IN A TILE BASED ARCHITECTURE
- Publication number 20140118376
- Publication date May 1, 2014
- NVIDIA Corporation
- Ziyad S. HAKURA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR AUTO-THROTTLING ENCAPSULATED COMPUTE TASKS
- Publication number 20130268942
- Publication date Oct 10, 2013
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING WORK DISTRIBUTION FOR PROCESSING TASKS
- Publication number 20130198759
- Publication date Aug 1, 2013
- Lacky V. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCHEDULING AND EXECUTION OF COMPUTE TASKS
- Publication number 20130185728
- Publication date Jul 18, 2013
- Karim M. ABDALLA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCHEDULING AND EXECUTION OF COMPUTE TASKS
- Publication number 20130185725
- Publication date Jul 18, 2013
- Karim M. ABDALLA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNALING, ORDERING, AND EXECUTION OF DYNAMICALLY GENERATED TASKS I...
- Publication number 20130160021
- Publication date Jun 20, 2013
- Timothy John PURCELL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE WORK DISTRIBUTION REFERENCE COUNTERS
- Publication number 20130117758
- Publication date May 9, 2013
- Philip Alexander Cuadra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIME SLICE PROCESSING OF TESSELLATION AND GEOMETRY SHADERS
- Publication number 20130038620
- Publication date Feb 14, 2013
- Ziyad S. Hakura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCK LINEAR MEMORY ORDERING OF TEXTURE DATA TECHNIQUES
- Publication number 20120176377
- Publication date Jul 12, 2012
- NVIDIA Corporation
- Walter E. Donovan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BLOCK LINEAR MEMORY ORDERING OF TEXTURE DATA
- Publication number 20110169850
- Publication date Jul 14, 2011
- NVIDIA Corporation
- Walter E. Donovan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Redistribution Of Generated Geometric Primitives
- Publication number 20110080404
- Publication date Apr 7, 2011
- Johnny S. RHOADES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE HIGH-PERFORMANCE TEXTURE PIPELINE WITH ADVANCED FILT...
- Publication number 20100118043
- Publication date May 13, 2010
- NVIDIA Corporation
- Alexander L. Minkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE SHADER ARCHITECTURE
- Publication number 20080094405
- Publication date Apr 24, 2008
- Rui M. Bastos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIXEL CENTER POSITION DISPLACEMENT
- Publication number 20070008336
- Publication date Jan 11, 2007
- Rui M. Bastos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory management system having a forward progress bit
- Publication number 20060092165
- Publication date May 4, 2006
- Karim M. Abdalla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pixel center position displacement
- Publication number 20060077209
- Publication date Apr 13, 2006
- Rui M. Bastos
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Increased scalability in the fragment shading pipeline
- Publication number 20060055695
- Publication date Mar 16, 2006
- NVIDIA Corporation
- Karim M. Abdalla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable shader architecture
- Publication number 20050225554
- Publication date Oct 13, 2005
- Rui M. Bastos
- G06 - COMPUTING CALCULATING COUNTING

Karim Abdalla

Person

Patents Grantslast 30 patents

Distributed index fetch, primitive assembly, and primitive batching

System, method, and computer program product for simultaneous execu...

Controlling work distribution for processing tasks

Heuristics for improving performance in a tile based architecture

Execution state analysis for assigning tasks to streaming multiproc...

Methods and apparatus for auto-throttling encapsulated compute tasks

Techniques for managing graphics processing resources in a tile-bas...

Method and system for distributing work batches to processing units...

Compute work distribution reference counters

Time slice processing of tessellation and geometry shaders

Scheduling and execution of compute tasks

Signaling, ordering, and execution of dynamically generated tasks i...

Redistribution of generated geometric primitives

Block linear memory ordering of texture data techniques

Block linear memory ordering of texture data

Translation of register-combiner state into shader microcode

Translation of register-combiner state into shader microcode

Block linear memory ordering of texture data

Reconfigurable high-performance texture pipeline with advanced filt...

Scalable shader architecture

Fragment processor having dual mode register file

Functional block level clock-gating within a graphics processor

Automatic functional block level clock-gating

Reconfigurable high performance texture pipeline with advanced filt...

Pixel center position displacement

Subpicture overlay using fragment shader

Architecture for compact multi-ported register file

Pixel center position displacement

Scalable shader architecture

Memory management system having a forward progress bit

Patents Applicationslast 30 patents

DISTRIBUTED INDEX FETCH, PRIMITIVE ASSEMBLY, AND PRIMITIVE BATCHING

SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR SIMULTANEOUS EXECU...

TECHNIQUES FOR MANAGING GRAPHICS PROCESSING RESOURCES IN A TILE-BAS...

HEURISTICS FOR IMPROVING PERFORMANCE IN A TILE BASED ARCHITECTURE

METHODS AND APPARATUS FOR AUTO-THROTTLING ENCAPSULATED COMPUTE TASKS

CONTROLLING WORK DISTRIBUTION FOR PROCESSING TASKS

SCHEDULING AND EXECUTION OF COMPUTE TASKS

SCHEDULING AND EXECUTION OF COMPUTE TASKS

SIGNALING, ORDERING, AND EXECUTION OF DYNAMICALLY GENERATED TASKS I...

COMPUTE WORK DISTRIBUTION REFERENCE COUNTERS

TIME SLICE PROCESSING OF TESSELLATION AND GEOMETRY SHADERS

BLOCK LINEAR MEMORY ORDERING OF TEXTURE DATA TECHNIQUES

BLOCK LINEAR MEMORY ORDERING OF TEXTURE DATA

Redistribution Of Generated Geometric Primitives

RECONFIGURABLE HIGH-PERFORMANCE TEXTURE PIPELINE WITH ADVANCED FILT...

SCALABLE SHADER ARCHITECTURE

PIXEL CENTER POSITION DISPLACEMENT

Memory management system having a forward progress bit

Pixel center position displacement

Increased scalability in the fragment shading pipeline

Scalable shader architecture