Karl P. Brummel

Person

Chicago, IL, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and arrangements to accelerate array searches
- Patent number 11,456,972
- Issue date Sep 27, 2022
- Intel Corporation
- Keith Underwood
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Device, method and system to enforce concurrency limits of a target...
- Patent number 11,172,016
- Issue date Nov 9, 2021
- Intel Corporation
- Karl P. Brummel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Congestion management techniques for communication networks
- Patent number 10,505,848
- Issue date Dec 10, 2019
- Intel Corporation
- Keith D. Underwood
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technologies for tracking out-of-order network packets
- Patent number 10,348,634
- Issue date Jul 9, 2019
- Intel Corporation
- Keith D. Underwood
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reliable out-of order end-to-end protocol with robust window state...
- Patent number 10,044,626
- Issue date Aug 7, 2018
- Intel Corporation
- Keith Underwood
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Cache memory system and method capable of adaptively accommodating...
- Patent number 7,543,113
- Issue date Jun 2, 2009
- Hewlett-Packard Development Company, L.P.
- Shawn Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for responding to TLB misses
- Patent number 7,409,524
- Issue date Aug 5, 2008
- Hewlett-Packard Development Company, L.P.
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of testing a plurality of memory blocks of an int...
- Patent number 7,152,192
- Issue date Dec 19, 2006
- Hewlett-Packard Development Company, L.P.
- Karl P. Brummel
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for verifying the correctness of a processor b...
- Patent number 7,139,936
- Issue date Nov 21, 2006
- Hewlett-Packard Development Company, L.P.
- Jeremy Petsinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generating random code
- Patent number 6,678,853
- Issue date Jan 13, 2004
- Hewlett-Packard Development Company, L.P.
- Karl P Brummel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for testing microarchitectural features by usi...
- Patent number 6,643,800
- Issue date Nov 4, 2003
- Hewlett-Packard Development Company, L.P.
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for verifying the fine-grained correctness of...
- Patent number 6,625,759
- Issue date Sep 23, 2003
- Hewlett-Packard Development Company, L.P.
- Jeremy Petsinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for evaluating processors for architectural co...
- Patent number 6,564,178
- Issue date May 13, 2003
- Hewlett-Packard Company
- Karl P Brummel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for enhanced functional testing of a processor using dynamic...
- Patent number 5,784,550
- Issue date Jul 21, 1998
- Hewlett-Packard Company
- Russell C. Brockmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for embedding operand synthesizing sequences i...
- Patent number 5,771,241
- Issue date Jun 23, 1998
- Hewlett-Packard Company
- Karl Brummel
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MAINTAINING STORAGE NAMESPACE IDENTIFIERS FOR LIVE VIRTUALIZED EXEC...
- Publication number 20200278893
- Publication date Sep 3, 2020
- Intel Corporation
- Jose NIELL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND ARRANGEMENTS TO ACCELERATE ARRAY SEARCHES
- Publication number 20190044890
- Publication date Feb 7, 2019
- Intel Corporation
- Keith Underwood
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DEVICE, METHOD AND SYSTEM TO ENFORCE CONCURRENCY LIMITS OF A TARGET...
- Publication number 20180287904
- Publication date Oct 4, 2018
- Intel Corporation
- Karl P. Brummel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Reliable out-of order end-to-end protocol with robust window state...
- Publication number 20170187637
- Publication date Jun 29, 2017
- Keith D. UNDERWOOD
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Congestion management techniques for communication networks
- Publication number 20170187630
- Publication date Jun 29, 2017
- Keith D. Underwood
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNOLOGIES FOR TRACKING OUT-OF-ORDER NETWORK PACKETS
- Publication number 20170180265
- Publication date Jun 22, 2017
- Intel Corporation
- Keith D. Underwood
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and method for responding to TLB misses
- Publication number 20070043929
- Publication date Feb 22, 2007
- Kevin Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method of testing a plurality of memory blocks of an int...
- Publication number 20060161824
- Publication date Jul 20, 2006
- Karl P. Brummel
- G11 - INFORMATION STORAGE
Information Patent Application
Cache memory system and method capable of adaptively accommodating...
- Publication number 20060004962
- Publication date Jan 5, 2006
- Shawn Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for testing errors in microprocessors
- Publication number 20040078650
- Publication date Apr 22, 2004
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for testing microarchitectural features by usi...
- Publication number 20040064267
- Publication date Apr 1, 2004
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for verifying the correctness of a processor b...
- Publication number 20040039966
- Publication date Feb 26, 2004
- Jeremy Petsinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for pseudorandom rare event injection to impro...
- Publication number 20040034820
- Publication date Feb 19, 2004
- Donald C. Soltis,
- G06 - COMPUTING CALCULATING COUNTING

Karl P. Brummel

Person

Patents Grantslast 30 patents

Methods and arrangements to accelerate array searches

Device, method and system to enforce concurrency limits of a target...

Congestion management techniques for communication networks

Technologies for tracking out-of-order network packets

Reliable out-of order end-to-end protocol with robust window state...

Cache memory system and method capable of adaptively accommodating...

System and method for responding to TLB misses

System and method of testing a plurality of memory blocks of an int...

Method and apparatus for verifying the correctness of a processor b...

Method and apparatus for generating random code

Method and apparatus for testing microarchitectural features by usi...

Method and apparatus for verifying the fine-grained correctness of...

Method and apparatus for evaluating processors for architectural co...

Method for enhanced functional testing of a processor using dynamic...

Method and apparatus for embedding operand synthesizing sequences i...

Patents Applicationslast 30 patents

MAINTAINING STORAGE NAMESPACE IDENTIFIERS FOR LIVE VIRTUALIZED EXEC...

METHODS AND ARRANGEMENTS TO ACCELERATE ARRAY SEARCHES

DEVICE, METHOD AND SYSTEM TO ENFORCE CONCURRENCY LIMITS OF A TARGET...

Reliable out-of order end-to-end protocol with robust window state...

Congestion management techniques for communication networks

TECHNOLOGIES FOR TRACKING OUT-OF-ORDER NETWORK PACKETS

System and method for responding to TLB misses

System and method of testing a plurality of memory blocks of an int...

Cache memory system and method capable of adaptively accommodating...

Method and apparatus for testing errors in microprocessors

Method and apparatus for testing microarchitectural features by usi...

Method and apparatus for verifying the correctness of a processor b...

Apparatus and method for pseudorandom rare event injection to impro...