Karl Schuh

Person

Santa Cruz, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory sub-system scan
- Patent number 12,148,484
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic buffer limit for at-risk data
- Patent number 12,073,873
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Karl D. Schuh
- G11 - INFORMATION STORAGE
Information Patent Grant
Opportunistic background data integrity scans
- Patent number 12,067,253
- Issue date Aug 20, 2024
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage calibration scans to reduce memory device overhead
- Patent number 12,057,185
- Issue date Aug 6, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective partitioning of sets of pages programmed to memory device
- Patent number 11,995,326
- Issue date May 28, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data reordering at a memory subsystem
- Patent number 11,934,686
- Issue date Mar 19, 2024
- Micron Technology, Inc.
- Karl David Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing voltage bin selection for blocks of a memory device
- Patent number 11,928,347
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing workload of programming sets of pages to memory device
- Patent number 11,886,336
- Issue date Jan 30, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory status command aggregation
- Patent number 11,861,228
- Issue date Jan 2, 2024
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system logical block address remapping
- Patent number 11,847,051
- Issue date Dec 19, 2023
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system write sequence track
- Patent number 11,841,794
- Issue date Dec 12, 2023
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transfer management within a memory device having multiple mem...
- Patent number 11,836,377
- Issue date Dec 5, 2023
- Micron Technology, Inc.
- Abdelhakim Alhussien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage bin calibration based on a temporary voltage shift offset
- Patent number 11,823,748
- Issue date Nov 21, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Grant
Read calibration based on ranges of program/erase cycles
- Patent number 11,797,216
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Zone based reconstruction of logical to physical address translatio...
- Patent number 11,797,435
- Issue date Oct 24, 2023
- Micron Technology, Inc.
- Daniel A. Boals
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tier threshold voltage offset bin calibration
- Patent number 11,783,901
- Issue date Oct 10, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Zone based reconstruction of logical to physical address translatio...
- Patent number 11,762,765
- Issue date Sep 19, 2023
- Micron Technology, Inc.
- Daniel A. Boals
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Grouping blocks based on power cycle and power on time
- Patent number 11,748,013
- Issue date Sep 5, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access collision management on a shared wordline
- Patent number 11,698,864
- Issue date Jul 11, 2023
- Micron Technology, Inc.
- Abdelhakim Alhussien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read window based on program/erase cycles
- Patent number 11,688,479
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage bin selection for blocks of a memory device after power up...
- Patent number 11,676,664
- Issue date Jun 13, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Grant
Managing workload of programming sets of pages to memory device
- Patent number 11,609,846
- Issue date Mar 21, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing voltage bin selection for blocks of a memory device
- Patent number 11,593,005
- Issue date Feb 28, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data validity tracking in a non-volatile memory
- Patent number 11,586,561
- Issue date Feb 21, 2023
- Micron Technology, Inc.
- Boon Leong Yeap
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage calibration scans to reduce memory device overhead
- Patent number 11,587,639
- Issue date Feb 21, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Temperature correction in memory sub-systems
- Patent number 11,544,008
- Issue date Jan 3, 2023
- Micron Technology, Inc.
- Gianni Stephen Alsasua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system scan
- Patent number 11,527,294
- Issue date Dec 13, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Establishing a delay period associated with a program resume operat...
- Patent number 11,507,317
- Issue date Nov 22, 2022
- Micron Technology, Inc.
- Jiangang Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Grouping blocks based on power cycle and power on time
- Patent number 11,500,564
- Issue date Nov 15, 2022
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling operation collisions in a non-volatile memory
- Patent number 11,481,348
- Issue date Oct 25, 2022
- Micron Technology, Inc.
- Lyle E. Adams
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DYNAMIC BUFFER LIMIT FOR AT-RISK DATA
- Publication number 20240379153
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Karl D. Schuh
- G11 - INFORMATION STORAGE
Information Patent Application
DATA REORDERING AT A MEMORY SUBSYSTEM
- Publication number 20240176532
- Publication date May 30, 2024
- MICRON TECHNOLGY, INC.
- Karl David Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM WRITE SEQUENCE TRACK
- Publication number 20240086316
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA REORDERING AT A MEMORY SUBSYSTEM
- Publication number 20230333770
- Publication date Oct 19, 2023
- Micron Technology, Inc.
- Karl David Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPPORTUNISTIC BACKGROUND DATA INTEGRITY SCANS
- Publication number 20230251779
- Publication date Aug 10, 2023
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING VOLTAGE BIN SELECTION FOR BLOCKS OF A MEMORY DEVICE
- Publication number 20230205438
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Adaptive Command Completion Timers
- Publication number 20230205455
- Publication date Jun 29, 2023
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING WORKLOAD OF PROGRAMMING SETS OF PAGES TO MEMORY DEVICE
- Publication number 20230176963
- Publication date Jun 8, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE CALIBRATION SCANS TO REDUCE MEMORY DEVICE OVERHEAD
- Publication number 20230122275
- Publication date Apr 20, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM SCAN
- Publication number 20230085178
- Publication date Mar 16, 2023
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC BUFFER LIMIT FOR AT-RISK DATA
- Publication number 20230064781
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Karl D. Schuh
- G11 - INFORMATION STORAGE
Information Patent Application
INDEPENDENT PLANE ARCHITECTURE IN A MEMORY DEVICE
- Publication number 20230059543
- Publication date Feb 23, 2023
- Micron Technology, Inc.
- Andrea Giovanni Xotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY STATUS COMMAND AGGREGATION
- Publication number 20230043418
- Publication date Feb 9, 2023
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GROUPING BLOCKS BASED ON POWER CYCLE AND POWER ON TIME
- Publication number 20230017591
- Publication date Jan 19, 2023
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE BIN CALIBRATION BASED ON A TEMPORARY VOTLAGE SHIFT OFFSET
- Publication number 20220392547
- Publication date Dec 8, 2022
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE BIN SELECTION FOR BLOCKS OF A MEMORY DEVICE AFTER POWER UP...
- Publication number 20220383955
- Publication date Dec 1, 2022
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-TIER THRESHOLD VOLTAGE OFFSET BIN CALIBRATION
- Publication number 20220375530
- Publication date Nov 24, 2022
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ CALIBRATION BASED ON RANGES OF PROGRAM/ERASE CYCLES
- Publication number 20220350520
- Publication date Nov 3, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM LOGICAL BLOCK ADDRESS REMAPPING
- Publication number 20220342810
- Publication date Oct 27, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA TRANSFER MANAGEMENT WITHIN A MEMORY DEVICE HAVING MULTIPLE MEM...
- Publication number 20220334759
- Publication date Oct 20, 2022
- Micron Technology, Inc.
- Abdelhakim Alhussien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING VOLTAGE BIN SELECTION FOR BLOCKS OF A MEMORY DEVICE
- Publication number 20220317902
- Publication date Oct 6, 2022
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE PARTITIONING OF SETS OF PAGES PROGRAMMED TO MEMORY DEVICE
- Publication number 20220291849
- Publication date Sep 15, 2022
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VOLTAGE CALIBRATION SCANS TO REDUCE MEMORY DEVICE OVERHEAD
- Publication number 20220293208
- Publication date Sep 15, 2022
- Micron Technology, Inc.
- Kishore Kumar MUCHHERLA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ACCESS COLLISION MANAGEMENT ON A SHARED WORDLINE
- Publication number 20220283952
- Publication date Sep 8, 2022
- Micron Technology, Inc.
- Abdelhakim Alhussien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GROUPING BLOCKS BASED ON POWER CYCLE AND POWER ON TIME
- Publication number 20220229554
- Publication date Jul 21, 2022
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM WRITE SEQUENCE TRACK
- Publication number 20220188223
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRIMS CORRESPONDING TO PROGRAM/ERASE CYCLES
- Publication number 20220189571
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Jeffrey S. McNeil
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SUB-SYSTEM MEDIA MANAGEMENT GROUPS
- Publication number 20220188034
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SUB-SYSTEM LOGICAL BLOCK ADDRESS REMAPPING
- Publication number 20220091975
- Publication date Mar 24, 2022
- Micron Technology, Inc.
- Kishore K. Muchherla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE PARTITIONING OF SETS OF PAGES PROGRAMMED TO MEMORY DEVICE
- Publication number 20220083243
- Publication date Mar 17, 2022
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Memory sub-system scan

Dynamic buffer limit for at-risk data

Opportunistic background data integrity scans

Voltage calibration scans to reduce memory device overhead

Selective partitioning of sets of pages programmed to memory device

Data reordering at a memory subsystem

Managing voltage bin selection for blocks of a memory device

Managing workload of programming sets of pages to memory device

Memory status command aggregation

Memory sub-system logical block address remapping

Memory sub-system write sequence track

Data transfer management within a memory device having multiple mem...

Voltage bin calibration based on a temporary voltage shift offset

Read calibration based on ranges of program/erase cycles

Zone based reconstruction of logical to physical address translatio...

Multi-tier threshold voltage offset bin calibration

Zone based reconstruction of logical to physical address translatio...

Grouping blocks based on power cycle and power on time

Memory access collision management on a shared wordline

Read window based on program/erase cycles

Voltage bin selection for blocks of a memory device after power up...

Managing workload of programming sets of pages to memory device

Managing voltage bin selection for blocks of a memory device

Data validity tracking in a non-volatile memory

Voltage calibration scans to reduce memory device overhead

Temperature correction in memory sub-systems

Memory sub-system scan

Establishing a delay period associated with a program resume operat...

Grouping blocks based on power cycle and power on time

Handling operation collisions in a non-volatile memory

Patents Applicationslast 30 patents

DYNAMIC BUFFER LIMIT FOR AT-RISK DATA

DATA REORDERING AT A MEMORY SUBSYSTEM

MEMORY SUB-SYSTEM WRITE SEQUENCE TRACK

DATA REORDERING AT A MEMORY SUBSYSTEM

OPPORTUNISTIC BACKGROUND DATA INTEGRITY SCANS

MANAGING VOLTAGE BIN SELECTION FOR BLOCKS OF A MEMORY DEVICE

Adaptive Command Completion Timers

MANAGING WORKLOAD OF PROGRAMMING SETS OF PAGES TO MEMORY DEVICE

VOLTAGE CALIBRATION SCANS TO REDUCE MEMORY DEVICE OVERHEAD

MEMORY SUB-SYSTEM SCAN

DYNAMIC BUFFER LIMIT FOR AT-RISK DATA

INDEPENDENT PLANE ARCHITECTURE IN A MEMORY DEVICE

MEMORY STATUS COMMAND AGGREGATION

GROUPING BLOCKS BASED ON POWER CYCLE AND POWER ON TIME

VOLTAGE BIN CALIBRATION BASED ON A TEMPORARY VOTLAGE SHIFT OFFSET

VOLTAGE BIN SELECTION FOR BLOCKS OF A MEMORY DEVICE AFTER POWER UP...

MULTI-TIER THRESHOLD VOLTAGE OFFSET BIN CALIBRATION

READ CALIBRATION BASED ON RANGES OF PROGRAM/ERASE CYCLES

MEMORY SUB-SYSTEM LOGICAL BLOCK ADDRESS REMAPPING

DATA TRANSFER MANAGEMENT WITHIN A MEMORY DEVICE HAVING MULTIPLE MEM...

MANAGING VOLTAGE BIN SELECTION FOR BLOCKS OF A MEMORY DEVICE

SELECTIVE PARTITIONING OF SETS OF PAGES PROGRAMMED TO MEMORY DEVICE

VOLTAGE CALIBRATION SCANS TO REDUCE MEMORY DEVICE OVERHEAD

MEMORY ACCESS COLLISION MANAGEMENT ON A SHARED WORDLINE

GROUPING BLOCKS BASED ON POWER CYCLE AND POWER ON TIME

MEMORY SUB-SYSTEM WRITE SEQUENCE TRACK

TRIMS CORRESPONDING TO PROGRAM/ERASE CYCLES

MEMORY SUB-SYSTEM MEDIA MANAGEMENT GROUPS

MEMORY SUB-SYSTEM LOGICAL BLOCK ADDRESS REMAPPING

SELECTIVE PARTITIONING OF SETS OF PAGES PROGRAMMED TO MEMORY DEVICE