Karthik Chandrasekar

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Power management for multi-dimensional programmable logic devices
- Patent number 11,444,624
- Issue date Sep 13, 2022
- Intel Corporation
- Karthik Chandrasekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management for multi-dimensional programmable logic devices
- Patent number 10,812,085
- Issue date Oct 20, 2020
- Intel Corporation
- Karthik Chandrasekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock architecture in heterogeneous system-in-package
- Patent number 10,770,443
- Issue date Sep 8, 2020
- Intel Corporation
- Karthik Chandrasekar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with enhanced cooling structure
- Patent number 10,504,819
- Issue date Dec 10, 2019
- Altera Corporation
- Ravi Gutala
- G01 - MEASURING TESTING
Information Patent Grant
2.5D electronic package
- Patent number 10,020,267
- Issue date Jul 10, 2018
- Altera Corporation
- Arifur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power line layout in integrated circuits
- Patent number 9,935,052
- Issue date Apr 3, 2018
- Altera Corporation
- Hui Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
2.5D electronic package
- Patent number 9,583,431
- Issue date Feb 28, 2017
- Altera Corporation
- Arifur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-chip packages with reduced power distribution network noise
- Patent number 9,129,935
- Issue date Sep 8, 2015
- Altera Corporation
- Karthik Chandrasekar
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
POWER MANAGEMENT FOR MULTI-DIMENSIONAL PROGRAMMABLE LOGIC DEVICES
- Publication number 20210036705
- Publication date Feb 4, 2021
- Intel Corporation
- Karthik Chandrasekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK ARCHITECTURE IN HETEROGENEOUS SYSTEM-IN-PACKAGE
- Publication number 20200105732
- Publication date Apr 2, 2020
- Intel Corporation
- Karthik Chandrasekar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER MANAGEMENT FOR MULTI-DIMENSIONAL PROGRAMMABLE LOGIC DEVICES
- Publication number 20190131976
- Publication date May 2, 2019
- Intel Corporation
- Karthik Chandrasekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR MANAGING APPLICATION-SPECIFIC POWER GATIN...
- Publication number 20180102776
- Publication date Apr 12, 2018
- Altera Corporation
- Karthik Chandrasekar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
2.5D ELECTRONIC PACKAGE
- Publication number 20170133329
- Publication date May 11, 2017
- Altera Corporation
- Arifur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH ENHANCED COOLING STRUCTURE
- Publication number 20170133298
- Publication date May 11, 2017
- Altera Corporation
- Ravi Gutala
- G01 - MEASURING TESTING

Karthik Chandrasekar

Person

Patents Grantslast 30 patents

Power management for multi-dimensional programmable logic devices

Power management for multi-dimensional programmable logic devices

Clock architecture in heterogeneous system-in-package

Integrated circuit package with enhanced cooling structure

2.5D electronic package

Power line layout in integrated circuits

2.5D electronic package

Multi-chip packages with reduced power distribution network noise

Patents Applicationslast 30 patents

POWER MANAGEMENT FOR MULTI-DIMENSIONAL PROGRAMMABLE LOGIC DEVICES

CLOCK ARCHITECTURE IN HETEROGENEOUS SYSTEM-IN-PACKAGE

POWER MANAGEMENT FOR MULTI-DIMENSIONAL PROGRAMMABLE LOGIC DEVICES

METHODS AND APPARATUS FOR MANAGING APPLICATION-SPECIFIC POWER GATIN...

2.5D ELECTRONIC PACKAGE

INTEGRATED CIRCUIT PACKAGE WITH ENHANCED COOLING STRUCTURE