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Karthik Reddy Neravetla
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San Jose, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Independent asynchronous framework for embedded subsystems
Patent number
10,146,296
Issue date
Dec 4, 2018
QUALCOMM Incorporated
Kenneth Gainey
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Fractional clock divider using digital techniques
Patent number
6,861,881
Issue date
Mar 1, 2005
National Semiconductor Corporation
Karthik R. Neravetla
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Phase locked loop clock divider utilizing a high speed programmable...
Patent number
6,556,647
Issue date
Apr 29, 2003
National Semiconductor Corporation
Karthik Reddy Neravetla
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Phase locked loop clock divider utilizing a high speed programmable...
Patent number
6,424,691
Issue date
Jul 23, 2002
National Semiconductor Corporation
Karthik R. Neravetla
H03 - BASIC ELECTRONIC CIRCUITRY
Patents Applications
last 30 patents
Information
Patent Application
INDEPENDENT ASYNCHRONOUS FRAMEWORK FOR EMBEDDED SUBSYSTEMS
Publication number
20160132097
Publication date
May 12, 2016
QUALCOMM Incorporated
Kenneth Gainey
G06 - COMPUTING CALCULATING COUNTING