Karthikeyan Ramamurthi

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory device including concurrent suspend states for different ope...
- Patent number 11,210,025
- Issue date Dec 28, 2021
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device including concurrent suspend states for different ope...
- Patent number 10,514,862
- Issue date Dec 24, 2019
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for performing a concurrent multiple page read of...
- Patent number 10,438,656
- Issue date Oct 8, 2019
- Intel Corporation
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth datapath load and test of multi-level memory cells
- Patent number 7,327,605
- Issue date Feb 5, 2008
- Intel Corporation
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth datapath load and test of multi-level memory cells
- Patent number 7,177,186
- Issue date Feb 13, 2007
- Intel Corporation
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE
Information Patent Grant
High bandwidth datapath load and test of multi-level memory cells
- Patent number 7,075,822
- Issue date Jul 11, 2006
- Intel Corporation
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory with coarse/fine gate step programming
- Patent number 7,057,934
- Issue date Jun 6, 2006
- Intel Corporation
- Sreeram Krishnamachari
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE INCLUDING CONCURRENT SUSPEND STATES FOR DIFFERENT OPE...
- Publication number 20200133579
- Publication date Apr 30, 2020
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR PERFORMING A CONCURRENT MULTIPLE PAGE READ OF...
- Publication number 20200090743
- Publication date Mar 19, 2020
- Intel Corporation
- Aliasgar S. MADRASWALA
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR PERFORMING A CONCURRENT MULTIPLE PAGE READ OF...
- Publication number 20190043564
- Publication date Feb 7, 2019
- Intel Corporation
- ALIASGAR S. MADRASWALA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING CONCURRENT SUSPEND STATES FOR DIFFERENT OPE...
- Publication number 20180024772
- Publication date Jan 25, 2018
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH BANDWIDTH DATAPATH LOAD AND TEST OF MULTI-LEVEL MEMORY CELLS
- Publication number 20080008010
- Publication date Jan 10, 2008
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE
Information Patent Application
High bandwidth datapath load and test of multi-level memory cells
- Publication number 20060193172
- Publication date Aug 31, 2006
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE
Information Patent Application
Flash memory with coarse/fine gate step programming
- Publication number 20050286304
- Publication date Dec 29, 2005
- Sreeram Krishnamachari
- G11 - INFORMATION STORAGE
Information Patent Application
High bandwidth datapath load and test of multi-level memory cells
- Publication number 20040128594
- Publication date Jul 1, 2004
- Daniel R. Elmhurst
- G11 - INFORMATION STORAGE

Karthikeyan Ramamurthi

Person

Patents Grantslast 30 patents

Memory device including concurrent suspend states for different ope...

Memory device including concurrent suspend states for different ope...

System and method for performing a concurrent multiple page read of...

High bandwidth datapath load and test of multi-level memory cells

High bandwidth datapath load and test of multi-level memory cells

High bandwidth datapath load and test of multi-level memory cells

Flash memory with coarse/fine gate step programming

Patents Applicationslast 30 patents

MEMORY DEVICE INCLUDING CONCURRENT SUSPEND STATES FOR DIFFERENT OPE...

SYSTEM AND METHOD FOR PERFORMING A CONCURRENT MULTIPLE PAGE READ OF...

SYSTEM AND METHOD FOR PERFORMING A CONCURRENT MULTIPLE PAGE READ OF...

MEMORY DEVICE INCLUDING CONCURRENT SUSPEND STATES FOR DIFFERENT OPE...

HIGH BANDWIDTH DATAPATH LOAD AND TEST OF MULTI-LEVEL MEMORY CELLS

High bandwidth datapath load and test of multi-level memory cells

Flash memory with coarse/fine gate step programming

High bandwidth datapath load and test of multi-level memory cells