Katsuaki Hongyo

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Hadano, JP

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor integrated circuit wiring condition processing program
- Patent number 6,836,876
- Issue date Dec 28, 2004
- Hitachi, Ltd.
- Katsuyoshi Suzuki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical wiring method for a semiconductor integrated circuit
- Patent number 6,496,968
- Issue date Dec 17, 2002
- Hitachi, Ltd.
- Hiromitsu Yamada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit wiring condition processing method
- Patent number 6,401,233
- Issue date Jun 4, 2002
- Hitachi, Ltd.
- Katsuyoshi Suzuki
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Computer readable storage medium
- Publication number 20020120913
- Publication date Aug 29, 2002
- Katsuyoshi Suzuki
- G06 - COMPUTING CALCULATING COUNTING