Katsuya Ishikawa

Person

Kawasaki, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor memory for relieving a defective bit
- Patent number 7,623,399
- Issue date Nov 24, 2009
- Fujitsu Microelectronics Limited
- Katsuya Ishikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Device and method for JTAG test
- Patent number 7,613,968
- Issue date Nov 3, 2009
- Fujitsu Microelectronics Limited
- Katsuya Ishikawa
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit
- Patent number 7,590,016
- Issue date Sep 15, 2009
- Fujitsu Microelectronics Limited
- Katsuya Ishikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit test apparatus
- Patent number 7,178,077
- Issue date Feb 13, 2007
- Fujitsu Limited
- Katsuya Ishikawa
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device and semiconductor integrated circuit
- Patent number 6,909,649
- Issue date Jun 21, 2005
- Fujitsu Limited
- Tomonori Honjou
- G01 - MEASURING TESTING
Information Patent Grant
Fixed-logic signal generated in an integrated circuit for testing a...
- Patent number 6,785,857
- Issue date Aug 31, 2004
- Fujitsu Limited
- Katsuya Ishikawa
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor device whereon memory chip and logic chip are mounted...
- Patent number 6,711,042
- Issue date Mar 23, 2004
- Fujitsu Limited
- Katsuya Ishikawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Power line connection circuit and power line switch IC for the same
- Patent number 5,650,741
- Issue date Jul 22, 1997
- Fujitsu Limited
- Toru Nakamura
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Waveform equalizer
- Patent number 5,579,340
- Issue date Nov 26, 1996
- Fujitsu Limited
- Motofumi Tokuriki
- G11 - INFORMATION STORAGE
Information Patent Grant
Ring oscillator having outputs that are selectively combined to pro...
- Patent number 5,262,735
- Issue date Nov 16, 1993
- Fujitsu Limited
- Yasuhiro Hashimoto
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Neuron architecture
- Patent number 5,220,559
- Issue date Jun 15, 1993
- Fujitsu Limited
- Hiroyuki Tsuzuki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error absorbing system in a neuron computer
- Patent number 5,216,746
- Issue date Jun 1, 1993
- Fujitsu Limited
- Hideki Yoshizawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neurocomputer with analog signal bus
- Patent number 5,131,072
- Issue date Jul 14, 1992
- Fujitsu, Ltd.
- Hideki Yoshizawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detection circuit for amplitude modulated signals
- Patent number 5,126,683
- Issue date Jun 30, 1992
- Fujitsu Limited
- Katsuya Ishikawa
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Integrated circuit
- Publication number 20080043552
- Publication date Feb 21, 2008
- FUJITSU LIMITED
- Katsuya Ishikawa
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory for relieving a defective bit
- Publication number 20070103998
- Publication date May 10, 2007
- FUJITSU LIMITED
- Katsuya Ishikawa
- G11 - INFORMATION STORAGE
Information Patent Application
Device and method for JTAG test
- Publication number 20060179373
- Publication date Aug 10, 2006
- FUJITSU LIMITED
- Katsuya Ishikawa
- G01 - MEASURING TESTING
Information Patent Application
Integrated circuit test apparatus
- Publication number 20050022082
- Publication date Jan 27, 2005
- FUJITSU LIMITED
- Katsuya Ishikawa
- G01 - MEASURING TESTING
Information Patent Application
Semiconductor device and semiconductor integrated circuit
- Publication number 20040015807
- Publication date Jan 22, 2004
- FUJITSU LIMITED
- Tomonori Honjou
- G01 - MEASURING TESTING
Information Patent Application
Semiconductor device whereon memory chip and logic chip are mounted...
- Publication number 20030043612
- Publication date Mar 6, 2003
- FUJITSU LIMITED
- Katsuya Ishikawa
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor integrated circuit
- Publication number 20030028835
- Publication date Feb 6, 2003
- FUJITSU LIMITED
- Katsuya Ishikawa
- G11 - INFORMATION STORAGE

Katsuya Ishikawa

Person

Patents Grantslast 30 patents

Semiconductor memory for relieving a defective bit

Device and method for JTAG test

Integrated circuit

Integrated circuit test apparatus

Semiconductor device and semiconductor integrated circuit

Fixed-logic signal generated in an integrated circuit for testing a...

Semiconductor device whereon memory chip and logic chip are mounted...

Power line connection circuit and power line switch IC for the same

Waveform equalizer

Ring oscillator having outputs that are selectively combined to pro...

Neuron architecture

Error absorbing system in a neuron computer

Neurocomputer with analog signal bus

Detection circuit for amplitude modulated signals

Patents Applicationslast 30 patents

Integrated circuit

Semiconductor memory for relieving a defective bit

Device and method for JTAG test

Integrated circuit test apparatus

Semiconductor device and semiconductor integrated circuit

Semiconductor device whereon memory chip and logic chip are mounted...

Semiconductor integrated circuit