Kaushik CHATTOPADHYAY

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
High aspect ratio etch of oxide metal oxide metal stack
- Patent number 10,242,883
- Issue date Mar 26, 2019
- Lam Research Corporation
- Joydeep Guha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back side deposition apparatus and applications
- Patent number 9,881,788
- Issue date Jan 30, 2018
- Lam Research Corporation
- Yunsang Kim
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
High aspect ratio etch with combination mask
- Patent number 9,659,783
- Issue date May 23, 2017
- Lam Research Corporation
- Joydeep Guha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High aspect ratio etch with combination mask
- Patent number 9,018,103
- Issue date Apr 28, 2015
- Lam Research Corporation
- Joydeep Guha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Protective self-aligned buffer layers for damascene interconnects
- Patent number 8,430,992
- Issue date Apr 30, 2013
- Novellus Systems, Inc.
- Kaushik Chattopadhyay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Protective self-aligned buffer layers for damascene interconnects
- Patent number 8,317,923
- Issue date Nov 27, 2012
- Novellus Systems, Inc.
- Kaushik Chattopadhyay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for reducing UV and dielectric diffusion barrier interaction
- Patent number 8,173,537
- Issue date May 8, 2012
- Novellus Systems, Inc.
- Kaushik Chattopadhyay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing UV and dielectric diffusion barrier interaction through th...
- Patent number 8,124,522
- Issue date Feb 28, 2012
- Novellus Systems, Inc.
- Hui-Jung Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Protective self-aligned buffer layers for damascene interconnects
- Patent number 8,021,486
- Issue date Sep 20, 2011
- Novellus Systems, Inc.
- Yongsik Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Protective self-aligned buffer layers for damascene interconnects
- Patent number 7,727,880
- Issue date Jun 1, 2010
- Novellus Systems, Inc.
- Kaushik Chattopadhyay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Protective self-aligned buffer layers for damascene interconnects
- Patent number 7,727,881
- Issue date Jun 1, 2010
- Novellus Systems, Inc.
- Kaushik Chattopadhyay
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Protective self-aligned buffer layers for damascene interconnects
- Patent number 7,704,873
- Issue date Apr 27, 2010
- Novellus Systems, Inc.
- Yongsik Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Protective self-aligned buffer layers for damascene interconnects
- Patent number 7,576,006
- Issue date Aug 18, 2009
- Novellus Systems, Inc.
- Yongsik Yu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
HIGH ASPECT RATIO ETCH OF OXIDE METAL OXIDE METAL STACK
- Publication number 20180374712
- Publication date Dec 27, 2018
- LAM RESEARCH CORPORATION
- Joydeep GUHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACK SIDE DEPOSITION APPARATUS AND APPLICATIONS
- Publication number 20150340225
- Publication date Nov 26, 2015
- LAM RESEARCH CORPORATION
- Yunsang Kim
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
HIGH ASPECT RATIO ETCH WITH COMBINATION MASK
- Publication number 20150200106
- Publication date Jul 16, 2015
- LAM RESEARCH CORPORATION
- Joydeep GUHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH ASPECT RATIO ETCH WITH COMBINATION MASK
- Publication number 20150087154
- Publication date Mar 26, 2015
- LAM RESEARCH CORPORATION
- Joydeep GUHA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Selective Capping of Metal Interconnect Lines during Air Gap Formation
- Publication number 20130323930
- Publication date Dec 5, 2013
- Kaushik Chattopadhyay
- H01 - BASIC ELECTRIC ELEMENTS

Kaushik CHATTOPADHYAY

Person

Patents Grantslast 30 patents

High aspect ratio etch of oxide metal oxide metal stack

Back side deposition apparatus and applications

High aspect ratio etch with combination mask

High aspect ratio etch with combination mask

Protective self-aligned buffer layers for damascene interconnects

Protective self-aligned buffer layers for damascene interconnects

Methods for reducing UV and dielectric diffusion barrier interaction

Reducing UV and dielectric diffusion barrier interaction through th...

Protective self-aligned buffer layers for damascene interconnects

Protective self-aligned buffer layers for damascene interconnects

Protective self-aligned buffer layers for damascene interconnects

Protective self-aligned buffer layers for damascene interconnects

Protective self-aligned buffer layers for damascene interconnects

Patents Applicationslast 30 patents

HIGH ASPECT RATIO ETCH OF OXIDE METAL OXIDE METAL STACK

BACK SIDE DEPOSITION APPARATUS AND APPLICATIONS

HIGH ASPECT RATIO ETCH WITH COMBINATION MASK

HIGH ASPECT RATIO ETCH WITH COMBINATION MASK

Selective Capping of Metal Interconnect Lines during Air Gap Formation