Kayla L. Chalmers

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Austin, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for generating a transfer function to process i...
- Patent number 8,891,131
- Issue date Nov 18, 2014
- Marvell International Ltd.
- Bradley C. Aldrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Look-up table for transfer function
- Patent number 8,665,486
- Issue date Mar 4, 2014
- Marvell International Ltd.
- Bradley C. Aldrich
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Variable width alignment engine for aligning instructions based on...
- Patent number 7,360,059
- Issue date Apr 15, 2008
- Analog Devices, Inc.
- Thomas Tomazin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aligning instructions using a variable width alignment engine havin...
- Patent number 7,082,516
- Issue date Jul 25, 2006
- Intel Corporation
- Thomas Tomazin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Byte aligned redundancy for memory array
- Patent number 6,985,392
- Issue date Jan 10, 2006
- Intel Corporation
- Robert D. Bateman
- G11 - INFORMATION STORAGE
Information Patent Grant
Byte aligned redundancy for memory array
- Patent number 6,831,868
- Issue date Dec 14, 2004
- Intel Corporation
- Robert D. Bateman
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
System and method for multiple color format spatial scaling
- Publication number 20080266310
- Publication date Oct 30, 2008
- Kayla Chalmers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Aligning instructions using a variable width instruction alignment...
- Publication number 20060149928
- Publication date Jul 6, 2006
- Intel Corporation, a Delaware corporation
- Thomas Tomazin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Look-up table for transfer function
- Publication number 20050213122
- Publication date Sep 29, 2005
- Bradley C. Aldrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Byte aligned redundancy for memory array
- Publication number 20050024981
- Publication date Feb 3, 2005
- Intel Corporation
- Robert D. Bateman
- G11 - INFORMATION STORAGE
Information Patent Application
Byte aligned redundancy for memory array
- Publication number 20040109360
- Publication date Jun 10, 2004
- Intel Corporation
- Robert D. Bateman
- G11 - INFORMATION STORAGE