Kazuhiro Kijima

Person

Kawaguchi-shi, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device having a specified terminal layout pattern
- Patent number 7,936,071
- Issue date May 3, 2011
- Seiko Epson Corporation
- Masaaki Abe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor wafer examination method and semiconductor chip manuf...
- Patent number 7,598,730
- Issue date Oct 6, 2009
- Seiko Epson Corporation
- Hideki Yuzawa
- G01 - MEASURING TESTING
Information Patent Grant
Semiconductor wafer examination method and semiconductor chip manuf...
- Patent number 7,573,256
- Issue date Aug 11, 2009
- Seiko Epson Corporation
- Hideki Yuzawa
- G01 - MEASURING TESTING
Information Patent Grant
Circuit wafer and TEG test pad electrode
- Patent number 5,654,582
- Issue date Aug 5, 1997
- Texas Instruments Incorporated
- Kazuhiro Kijima
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20080088024
- Publication date Apr 17, 2008
- SEIKO EPSON CORPORATION
- Masaaki ABE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...
- Publication number 20070259458
- Publication date Nov 8, 2007
- SEIKO EPSON CORPORATION
- Hideki YUZAWA
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...
- Publication number 20070259459
- Publication date Nov 8, 2007
- SEIKO EPSON CORPORATION
- Hideki YUZAWA
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...
- Publication number 20070259460
- Publication date Nov 8, 2007
- SEIKO EPSON CORPORATION
- Hideki YUZAWA
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...
- Publication number 20070259461
- Publication date Nov 8, 2007
- SEIKO EPSON CORPORATION
- Hideki YUZAWA
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...
- Publication number 20070254388
- Publication date Nov 1, 2007
- SEIKO EPSON CORPORATION
- Hideki YUZAWA
- G01 - MEASURING TESTING
Information Patent Application
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
- Publication number 20070026661
- Publication date Feb 1, 2007
- SEIKO EPSON CORPORATION
- Michiyoshi TAKANO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...
- Publication number 20070018675
- Publication date Jan 25, 2007
- SEIKO EPSON CORPORATION
- Hideki YUZAWA
- G01 - MEASURING TESTING
Information Patent Application
Semiconductor device
- Publication number 20050263889
- Publication date Dec 1, 2005
- Masaaki Abe
- H01 - BASIC ELECTRIC ELEMENTS

Kazuhiro Kijima

Person

Patents Grantslast 30 patents

Semiconductor device having a specified terminal layout pattern

Semiconductor wafer examination method and semiconductor chip manuf...

Semiconductor wafer examination method and semiconductor chip manuf...

Circuit wafer and TEG test pad electrode

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE

SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...

SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...

SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...

SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...

SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...

METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE

SEMICONDUCTOR WAFER EXAMINATION METHOD AND SEMICONDUCTOR CHIP MANUF...

Semiconductor device