Kazuo Tsuzuki

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Osaka, JP

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Patents Grantslast 30 patents

Information Patent Grant
Method for designing layout of semiconductor device, storage medium...
- Patent number 6,532,581
- Issue date Mar 11, 2003
- Matsushita Electric Industrial Co., Ltd.
- Masahiko Toyonaga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated logic circuit device
- Patent number 5,986,292
- Issue date Nov 16, 1999
- Matsushita Electric Industrial Co., Ltd.
- Hiroshi Mizuno
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for generating planarizing pattern and semicon...
- Patent number 5,970,238
- Issue date Oct 19, 1999
- Matsushita Electric Industrial Co., Ltd.
- Hidenori Shibata
- G06 - COMPUTING CALCULATING COUNTING