Ke-Wei Su

Person

Zhubei City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit layout generation method and system
- Patent number 12,135,930
- Issue date Nov 5, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ke-Ying Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit layout generation method
- Patent number 11,907,636
- Issue date Feb 20, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ke-Ying Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit layout generation method and system
- Patent number 11,842,135
- Issue date Dec 12, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ke-Ying Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit layout generation method and system
- Patent number 11,392,749
- Issue date Jul 19, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ke-Ying Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High sensitivity ISFET sensor
- Patent number 11,293,897
- Issue date Apr 5, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd
- Katherine H. Chiang
- G01 - MEASURING TESTING
Information Patent Grant
RC tool accuracy time reduction
- Patent number 10,922,464
- Issue date Feb 16, 2021
- Taiwan Semiconductor Manufacturing Company Limited
- Hui-I Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for integrated circuit design with on-chip variat...
- Patent number 10,860,769
- Issue date Dec 8, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Katherine Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit modeling methods and systems
- Patent number 10,846,456
- Issue date Nov 24, 2020
- Taiwan Semiconductor Manufacturing Company Ltd.
- Ke-Ying Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit layout generation method and system
- Patent number 10,796,059
- Issue date Oct 6, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ke-Ying Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for integrated circuit design with on-chip variat...
- Patent number 10,521,538
- Issue date Dec 31, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Katherine Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RC tool accuracy time reduction
- Patent number 10,515,172
- Issue date Dec 24, 2019
- Taiwan Semiconductor Manufacturing Company Limited
- Hui-I Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for establishing aging model of device and analyzing aging s...
- Patent number 10,216,879
- Issue date Feb 26, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd
- Yi-Shun Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, device and computer program product for integrated circuit...
- Patent number 10,140,407
- Issue date Nov 27, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chia-Ming Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simulation scheme including self heating effect
- Patent number 10,019,545
- Issue date Jul 10, 2018
- Taiwan Semiconductor Manufacturing Company
- Min-Chie Jeng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of generating modified layout and system therefor
- Patent number 10,019,548
- Issue date Jul 10, 2018
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chia-Ming Ho
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for analyzing interconnect process variation
- Patent number 9,904,743
- Issue date Feb 27, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Te-Yu Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mask design based on sensitivities to changes in pattern spacing
- Patent number 9,846,761
- Issue date Dec 19, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Cheng Chou
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of generating modified layout for RC extraction
- Patent number 9,710,588
- Issue date Jul 18, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Ming Ho
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of designing circuit layout and system for implementing the...
- Patent number 9,558,314
- Issue date Jan 31, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Te-Yu Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for capacitance extraction
- Patent number 9,471,738
- Issue date Oct 18, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Cheng Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mask shift resistance-inductance method for multiple patterning mas...
- Patent number 9,448,467
- Issue date Sep 20, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Cheng Chou
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
RC corner solutions for double patterning technology
- Patent number 9,361,423
- Issue date Jun 7, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ke-Ying Su
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit simulation with rule check for device
- Patent number 9,239,898
- Issue date Jan 19, 2016
- Taiwan Semiconductor Manufacturing Company Ltd.
- Hsien-Ming Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of generating a simulation model of a predefined fabrication...
- Patent number 9,230,052
- Issue date Jan 5, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Ming Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit device reliability simulation system
- Patent number 9,141,735
- Issue date Sep 22, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jia-Lin Lo
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus for RC extraction
- Patent number 9,081,933
- Issue date Jul 14, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Te-Yu Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RC extraction methodology for floating silicon substrate with TSV
- Patent number 9,021,412
- Issue date Apr 28, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Ze-Ming Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for tuning technology files
- Patent number 9,003,345
- Issue date Apr 7, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Meng-Fan Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-patterning mask decomposition method and system
- Patent number 8,954,900
- Issue date Feb 10, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chia-Ming Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
RC extraction for multiple patterning layout design
- Patent number 8,904,314
- Issue date Dec 2, 2014
- Taiwan Semiconductor Manufacturing Company Limited
- Chia-Ming Ho
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
BIDIRECTIONAL HYBRID POWER CONVERSION SYSTEM
- Publication number 20240405682
- Publication date Dec 5, 2024
- Chip-GaN Power Semiconductor Corporation
- KE-HORNG CHEN
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM
- Publication number 20240386181
- Publication date Nov 21, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH SENSITIVITY ISFET SENSOR
- Publication number 20240377352
- Publication date Nov 14, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Katherine H. Chiang
- G01 - MEASURING TESTING
Information Patent Application
DRIVING DEVICE
- Publication number 20240372459
- Publication date Nov 7, 2024
- Chip-GaN Power Semiconductor Corporation
- KE-HORNG CHEN
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
INTEGRATED CIRCUIT LAYOUT GENERATION METHOD
- Publication number 20240160828
- Publication date May 16, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM
- Publication number 20240111935
- Publication date Apr 4, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Thin-Film Transistors For Detecting Miniature Targets
- Publication number 20240038894
- Publication date Feb 1, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Device And Method For Detecting Miniature Targets In A Fluid Sample
- Publication number 20240036000
- Publication date Feb 1, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei Lee
- G01 - MEASURING TESTING
Information Patent Application
Miniature-Target-Detecting Transistors With Different Gate Structures
- Publication number 20240036001
- Publication date Feb 1, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei Lee
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR STRUCTURE HAVING BIOSENSOR AND MANUFACTURING METHOD T...
- Publication number 20230408442
- Publication date Dec 21, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei Lee
- B01 - PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
Information Patent Application
SEMICONDUCTOR STRUCTURE HAVING BIOSENSOR AND MANUFACTURING METHOD T...
- Publication number 20230408443
- Publication date Dec 21, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei Lee
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20230393092
- Publication date Dec 7, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei Lee
- G01 - MEASURING TESTING
Information Patent Application
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
- Publication number 20230393093
- Publication date Dec 7, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei Lee
- G01 - MEASURING TESTING
Information Patent Application
BIOSENSOR
- Publication number 20230366851
- Publication date Nov 16, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei Lee
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT LAYOUT GENERATION METHOD
- Publication number 20220343054
- Publication date Oct 27, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH SENSITIVITY ISFET SENSOR
- Publication number 20220221421
- Publication date Jul 14, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Katherine H. Chiang
- G01 - MEASURING TESTING
Information Patent Application
SYSTEMS AND METHODS FOR CAPACITANCE EXTRACTION
- Publication number 20220147678
- Publication date May 12, 2022
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuo Fu LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM
- Publication number 20210073454
- Publication date Mar 11, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR EPITAXIAL STRUCTURE AND METHOD OF FORMING THE SAME
- Publication number 20210017669
- Publication date Jan 21, 2021
- GLOBALWAFERS CO., LTD.
- Yen-Lun Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM
- Publication number 20210019467
- Publication date Jan 21, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH SENSITIVITY ISFET SENSOR
- Publication number 20200173958
- Publication date Jun 4, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Katherine H. Chiang
- G01 - MEASURING TESTING
Information Patent Application
Method and System for Integrated Circuit Design With On-Chip Variat...
- Publication number 20200125782
- Publication date Apr 23, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Katherine Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RC Tool Accuracy Time Reduction
- Publication number 20200110913
- Publication date Apr 9, 2020
- Taiwan Semiconductor Manufacturing Company Limited
- Hui-I Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT MODELING METHODS AND SYSTEMS
- Publication number 20190340328
- Publication date Nov 7, 2019
- Taiwan Semiconductor Manufacturing company Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM
- Publication number 20190294750
- Publication date Sep 26, 2019
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ke-Ying SU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RC Tool Accuracy Time Reduction
- Publication number 20190121928
- Publication date Apr 25, 2019
- Taiwan Semiconductor Manufacturing Company Limited
- Hui-I Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR ESTABLISHING AGING MODEL OF DEVICE AND ANALYZING AGING S...
- Publication number 20190065648
- Publication date Feb 28, 2019
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yi-Shun HUANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Integrated Circuit Design With On-Chip Variat...
- Publication number 20170316138
- Publication date Nov 2, 2017
- Taiwan Semiconductor Manufacturing Co., LTD
- Katherine Chiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF GENERATING MODIFIED LAYOUT AND SYSTEM THEREFOR
- Publication number 20170316142
- Publication date Nov 2, 2017
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Ming HO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR ANALYZING INTERCONNECT PROCESS VARIATION
- Publication number 20170122998
- Publication date May 4, 2017
- Taiwan Semiconductor Manufacturing Co., LTD
- Te-Yu Liu
- G01 - MEASURING TESTING

Person

Patents Grantslast 30 patents

Integrated circuit layout generation method and system

Integrated circuit layout generation method

Integrated circuit layout generation method and system

Integrated circuit layout generation method and system

High sensitivity ISFET sensor

RC tool accuracy time reduction

Method and system for integrated circuit design with on-chip variat...

Integrated circuit modeling methods and systems

Integrated circuit layout generation method and system

Method and system for integrated circuit design with on-chip variat...

RC tool accuracy time reduction

Method for establishing aging model of device and analyzing aging s...

Method, device and computer program product for integrated circuit...

Simulation scheme including self heating effect

Method of generating modified layout and system therefor

Method for analyzing interconnect process variation

Mask design based on sensitivities to changes in pattern spacing

Method of generating modified layout for RC extraction

Method of designing circuit layout and system for implementing the...

Method and apparatus for capacitance extraction

Mask shift resistance-inductance method for multiple patterning mas...

RC corner solutions for double patterning technology

Circuit simulation with rule check for device

Method of generating a simulation model of a predefined fabrication...

Circuit device reliability simulation system

Methods and apparatus for RC extraction

RC extraction methodology for floating silicon substrate with TSV

Systems and methods for tuning technology files

Multi-patterning mask decomposition method and system

RC extraction for multiple patterning layout design

Patents Applicationslast 30 patents

BIDIRECTIONAL HYBRID POWER CONVERSION SYSTEM

INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM

HIGH SENSITIVITY ISFET SENSOR

DRIVING DEVICE

INTEGRATED CIRCUIT LAYOUT GENERATION METHOD

INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM

Thin-Film Transistors For Detecting Miniature Targets

Device And Method For Detecting Miniature Targets In A Fluid Sample

Miniature-Target-Detecting Transistors With Different Gate Structures

SEMICONDUCTOR STRUCTURE HAVING BIOSENSOR AND MANUFACTURING METHOD T...

SEMICONDUCTOR STRUCTURE HAVING BIOSENSOR AND MANUFACTURING METHOD T...

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

BIOSENSOR

INTEGRATED CIRCUIT LAYOUT GENERATION METHOD

HIGH SENSITIVITY ISFET SENSOR

SYSTEMS AND METHODS FOR CAPACITANCE EXTRACTION

INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM

SEMICONDUCTOR EPITAXIAL STRUCTURE AND METHOD OF FORMING THE SAME

INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM

HIGH SENSITIVITY ISFET SENSOR

Method and System for Integrated Circuit Design With On-Chip Variat...

RC Tool Accuracy Time Reduction

INTEGRATED CIRCUIT MODELING METHODS AND SYSTEMS

INTEGRATED CIRCUIT LAYOUT GENERATION METHOD AND SYSTEM

RC Tool Accuracy Time Reduction

METHOD FOR ESTABLISHING AGING MODEL OF DEVICE AND ANALYZING AGING S...

Method and System for Integrated Circuit Design With On-Chip Variat...

METHOD OF GENERATING MODIFIED LAYOUT AND SYSTEM THEREFOR

METHOD FOR ANALYZING INTERCONNECT PROCESS VARIATION