Kedar Rajpathak

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Santa Clara, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Low power and area clock monitoring circuit using a capacitor and c...
- Patent number 12,265,416
- Issue date Apr 1, 2025
- NVIDIA Corporation
- Kedar Rajpathak
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LOW POWER AND AREA CLOCK MONITORING CIRCUIT USING A CAPACITOR AND C...
- Publication number 20240338051
- Publication date Oct 10, 2024
- NIVIDIA CORPORATION
- Kedar Rajpathak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER AND AREA CLOCK MONITORING CIRCUIT USING RING DELAY ARRANG...
- Publication number 20240340157
- Publication date Oct 10, 2024
- Kedar Rajpathak
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW POWER AND AREA CLOCK MONITORING CIRCUIT USING RING DELAY ARRANG...
- Publication number 20240337690
- Publication date Oct 10, 2024
- NVIDIA Corporation
- Kedar Rajpathak
- G06 - COMPUTING CALCULATING COUNTING