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Keith R. Bean
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Greeley, CO, US
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Patents Grants
last 30 patents
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Patent Grant
Constructing a model of a programmable logic device
Patent number
7,584,448
Issue date
Sep 1, 2009
Xilinx, Inc.
Bart Reynolds
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Determining networks of a tile module of a programmable logic device
Patent number
7,536,668
Issue date
May 19, 2009
Xilinx, Inc.
Bart Reynolds
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Comparing graphical and netlist connections of a programmable logic...
Patent number
7,472,370
Issue date
Dec 30, 2008
Xilinx, Inc.
Bart Reynolds
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Determining controlling pins for a tile module of a programmable lo...
Patent number
7,451,425
Issue date
Nov 11, 2008
Xilinx, Inc.
Bart Reynolds
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Determining reachable pins of a network of a programmable logic device
Patent number
7,451,420
Issue date
Nov 11, 2008
Xilinx, Inc.
Bart Reynolds
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Determining indices of configuration memory cell modules of a progr...
Patent number
7,451,423
Issue date
Nov 11, 2008
Xilinx, Inc.
Bart Reynolds
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Determining programmable connections through a switchbox of a progr...
Patent number
7,451,424
Issue date
Nov 11, 2008
Xilinx, Inc.
Bart Reynolds
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
PLD device representation with factored repeatable tiles
Patent number
7,107,565
Issue date
Sep 12, 2006
Xilinx, Inc.
Jeffrey V. Lindholm
G06 - COMPUTING CALCULATING COUNTING