KEMAL AYGUN

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Optical multichip package with multiple system-on-chip dies
- Patent number 12,148,744
- Issue date Nov 19, 2024
- Intel Corporation
- Zhichao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Minimizing package impedance discontinuity through dielectric struc...
- Patent number 12,125,777
- Issue date Oct 22, 2024
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power delivery for embedded bridge die utilizing trench structures
- Patent number 12,062,616
- Issue date Aug 13, 2024
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package design scheme for enabling high-speed low-loss signaling an...
- Patent number 12,057,413
- Issue date Aug 6, 2024
- Intel Corporation
- Lijiang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect loss of high density package with magnetic material
- Patent number 12,009,320
- Issue date Jun 11, 2024
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electrical and optical interfaces at different heights along an edg...
- Patent number 11,983,135
- Issue date May 14, 2024
- Intel Corporation
- Dheeraj Subbareddy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Die interconnect structures having bump field and ground plane
- Patent number 11,923,308
- Issue date Mar 5, 2024
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fine feature formation techniques for printed circuit boards
- Patent number 11,903,138
- Issue date Feb 13, 2024
- Intel Corporation
- Eric Li
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Ground via clustering for crosstalk mitigation
- Patent number 11,901,280
- Issue date Feb 13, 2024
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dielectric-filled trench isolation of vias
- Patent number 11,887,932
- Issue date Jan 30, 2024
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power delivery for embedded bridge die utilizing trench structures
- Patent number 11,837,549
- Issue date Dec 5, 2023
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power delivery for embedded bridge die utilizing trench structures
- Patent number 11,817,391
- Issue date Nov 14, 2023
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layered adhesion promotion films
- Patent number 11,810,859
- Issue date Nov 7, 2023
- Intel Corporation
- Srinivas V. Pietambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Ground via clustering for crosstalk mitigation
- Patent number 11,742,275
- Issue date Aug 29, 2023
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective ground flood around reduced land pad on package base laye...
- Patent number 11,737,227
- Issue date Aug 22, 2023
- Intel Corporation
- Zhichao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Slow wave structure for millimeter wave antennas
- Patent number 11,715,889
- Issue date Aug 1, 2023
- Intel Corporation
- Zhichao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Horizontal pitch translation using embedded bridge dies
- Patent number 11,694,952
- Issue date Jul 4, 2023
- Intel Corporation
- Sujit Sharan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package substrates with magnetic build-up layers
- Patent number 11,682,613
- Issue date Jun 20, 2023
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power delivery for embedded bridge die utilizing trench structures
- Patent number 11,621,227
- Issue date Apr 4, 2023
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Optimal signal routing performance through dielectric material conf...
- Patent number 11,574,862
- Issue date Feb 7, 2023
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Minimization of insertion loss variation in through-silicon vias (T...
- Patent number 11,545,416
- Issue date Jan 3, 2023
- Intel Corporation
- Jianyong Xie
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Density-graded adhesion layer for conductors
- Patent number 11,508,676
- Issue date Nov 22, 2022
- Intel Corporation
- Rahul N. Manepalli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Architecture and processes to enable high capacity memory packages...
- Patent number 11,456,281
- Issue date Sep 27, 2022
- Intel Corporation
- Yí Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Intra-semiconductor die communication via waveguide in a multi-die...
- Patent number 11,450,629
- Issue date Sep 20, 2022
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tunable passive semiconductor elements
- Patent number 11,437,366
- Issue date Sep 6, 2022
- Intel Corporation
- Zhichao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density interconnect structures configured for manufacturing a...
- Patent number 11,387,188
- Issue date Jul 12, 2022
- Intel Corporation
- Henning Braunisch
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EMIB copper layer for signal and power routing
- Patent number 11,322,445
- Issue date May 3, 2022
- Intel Corporation
- Yidnekachew S. Mekonnen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Dielectric-filled trench isolation of vias
- Patent number 11,296,031
- Issue date Apr 5, 2022
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stiffener and package substrate for a semiconductor package
- Patent number 11,295,998
- Issue date Apr 5, 2022
- Intel Corporation
- Stephen Christianson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Selective ground flood around reduced land pad on package base laye...
- Patent number 11,291,133
- Issue date Mar 29, 2022
- Intel Corporation
- Zhichao Zhang
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
POWER DELIVERY FOR EMBEDDED BRIDGE DIE UTILIZING TRENCH STRUCTURES
- Publication number 20240355745
- Publication date Oct 24, 2024
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REG...
- Publication number 20240222321
- Publication date Jul 4, 2024
- Intel Corporation
- Sagar Suthram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REG...
- Publication number 20240222326
- Publication date Jul 4, 2024
- Intel Corporation
- Sagar Suthram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REG...
- Publication number 20240222328
- Publication date Jul 4, 2024
- Intel Corporation
- Sagar Suthram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE SUBSTRATE WITH OPEN AIR GAP STRUCTURES
- Publication number 20240113049
- Publication date Apr 4, 2024
- Intel Corporation
- Kristof Kuwawi Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GROUND VIA CLUSTERING FOR CROSSTALK MITIGATION
- Publication number 20240105572
- Publication date Mar 28, 2024
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADAPTIVE TRACE WIDTH IN MULTI-LAYER SUBSTRATE PACKAGE
- Publication number 20240070366
- Publication date Feb 29, 2024
- Intel Corporation
- Nicholas HAEHN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SKIP LAYER WITH AIR GAP ON GLASS SUBSTRATES
- Publication number 20240063100
- Publication date Feb 22, 2024
- Intel Corporation
- Brandon C. MARIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER DELIVERY FOR EMBEDDED BRIDGE DIE UTILIZING TRENCH STRUCTURES
- Publication number 20240030143
- Publication date Jan 25, 2024
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW INSERTION LOSS COAXIAL THROUGH-HOLE FOR HIGHSPEED INPUT-OUPUT
- Publication number 20240006289
- Publication date Jan 4, 2024
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGING ARCHITECTURE WITH ROUNDED TRACES FOR ON-PACKAGE HIGH-SPEE...
- Publication number 20230420347
- Publication date Dec 28, 2023
- Intel Corporation
- Cemil Geyik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGING ARCHITECTURE WITH TRENCH VIA ROUTING FOR ON-PACKAGE HIGH-...
- Publication number 20230420377
- Publication date Dec 28, 2023
- Intel Corporation
- Cemil Geyik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGES WITH SILVER AND SILICON NITRIDE MULTI-L...
- Publication number 20230420358
- Publication date Dec 28, 2023
- Intel Corporation
- Cemil S. Geyik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS AND APPARATUS TO IMPROVE SIGNAL INTEGRITY PERFORMANCE IN IN...
- Publication number 20230352416
- Publication date Nov 2, 2023
- Intel Corporation
- Cemil Geyik
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED VIA MODULATOR IN HIGH SPEED INTERCONNECT
- Publication number 20230317588
- Publication date Oct 5, 2023
- Intel Corporation
- Jiwei SUN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER DELIVERY FOR EMBEDDED BRIDGE DIE UTILIZING TRENCH STRUCTURES
- Publication number 20230238332
- Publication date Jul 27, 2023
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER DELIVERY FOR EMBEDDED BRIDGE DIE UTILIZING TRENCH STRUCTURES
- Publication number 20230138168
- Publication date May 4, 2023
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GLASS SUBSTRATES HAVING SIGNAL SHIELDING FOR USE WITH SEMICONDUCTOR...
- Publication number 20230103183
- Publication date Mar 30, 2023
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICAL WAVEGUIDES WITHIN A GLASS SUBSTRATE TO OPTICALLY COUPLE DIE...
- Publication number 20230091050
- Publication date Mar 23, 2023
- Intel Corporation
- Zhichao ZHANG
- G02 - OPTICS
Information Patent Application
MULTI LAYER PACKAGE SUBSTRATE HAVING DIFFERENT DIELECTRIC MATERIALS...
- Publication number 20230090188
- Publication date Mar 23, 2023
- Intel Corporation
- Junxin WANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GROUND VIA CLUSTERING FOR CROSSTALK MITIGATION
- Publication number 20230014579
- Publication date Jan 19, 2023
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THROUGH-SUBSTRATE OPTICAL VIAS
- Publication number 20220404551
- Publication date Dec 22, 2022
- Intel Corporation
- Pooya Tadayon
- G02 - OPTICS
Information Patent Application
HETEROGENOUS SOCKET CONTACT FOR ELECTRICAL AND MECHANICAL PERFORMAN...
- Publication number 20220407254
- Publication date Dec 22, 2022
- Intel Corporation
- Zhichao Zhang
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
DIELECTRIC-FILLED TRENCH ISOLATION OF VIAS
- Publication number 20220270974
- Publication date Aug 25, 2022
- Intel Corporation
- Kemal Aygun
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
OPTICAL MULTICHIP PACKAGE WITH MULTIPLE SYSTEM-ON-CHIP DIES
- Publication number 20220199600
- Publication date Jun 23, 2022
- Intel Corporation
- Zhichao ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECTIVE GROUND FLOOD AROUND REDUCED LAND PAD ON PACKAGE BASE LAYE...
- Publication number 20220183177
- Publication date Jun 9, 2022
- Intel Corporation
- Zhichao ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH BANDWIDTH OPTICAL INTERCONNECTION ARCHITECTURES
- Publication number 20220155539
- Publication date May 19, 2022
- Intel Corporation
- Srinivas V. PIETAMBARAM
- G02 - OPTICS
Information Patent Application
HORIZONTAL PITCH TRANSLATION USING EMBEDDED BRIDGE DIES
- Publication number 20220157706
- Publication date May 19, 2022
- Intel Corporation
- Sujit SHARAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GROUND VIA CLUSTERING FOR CROSSTALK MITIGATION
- Publication number 20220130742
- Publication date Apr 28, 2022
- Intel Corporation
- Zhiguo Qian
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ENABLING LONG INTERCONNECT BRIDGES
- Publication number 20220130763
- Publication date Apr 28, 2022
- Intel Corporation
- Ravindranath V. Mahajan
- H01 - BASIC ELECTRIC ELEMENTS

KEMAL AYGUN

Person

Patents Grantslast 30 patents

Optical multichip package with multiple system-on-chip dies

Minimizing package impedance discontinuity through dielectric struc...

Power delivery for embedded bridge die utilizing trench structures

Package design scheme for enabling high-speed low-loss signaling an...

Interconnect loss of high density package with magnetic material

Electrical and optical interfaces at different heights along an edg...

Die interconnect structures having bump field and ground plane

Fine feature formation techniques for printed circuit boards

Ground via clustering for crosstalk mitigation

Dielectric-filled trench isolation of vias

Power delivery for embedded bridge die utilizing trench structures

Power delivery for embedded bridge die utilizing trench structures

Multi-layered adhesion promotion films

Ground via clustering for crosstalk mitigation

Selective ground flood around reduced land pad on package base laye...

Slow wave structure for millimeter wave antennas

Horizontal pitch translation using embedded bridge dies

Package substrates with magnetic build-up layers

Power delivery for embedded bridge die utilizing trench structures

Optimal signal routing performance through dielectric material conf...

Minimization of insertion loss variation in through-silicon vias (T...

Density-graded adhesion layer for conductors

Architecture and processes to enable high capacity memory packages...

Intra-semiconductor die communication via waveguide in a multi-die...

Tunable passive semiconductor elements

High density interconnect structures configured for manufacturing a...

EMIB copper layer for signal and power routing

Dielectric-filled trench isolation of vias

Stiffener and package substrate for a semiconductor package

Selective ground flood around reduced land pad on package base laye...

Patents Applicationslast 30 patents

POWER DELIVERY FOR EMBEDDED BRIDGE DIE UTILIZING TRENCH STRUCTURES

PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REG...

PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REG...

PACKAGE ARCHITECTURE WITH MEMORY CHIPS HAVING DIFFERENT PROCESS REG...

PACKAGE SUBSTRATE WITH OPEN AIR GAP STRUCTURES

GROUND VIA CLUSTERING FOR CROSSTALK MITIGATION

ADAPTIVE TRACE WIDTH IN MULTI-LAYER SUBSTRATE PACKAGE

SKIP LAYER WITH AIR GAP ON GLASS SUBSTRATES

POWER DELIVERY FOR EMBEDDED BRIDGE DIE UTILIZING TRENCH STRUCTURES

LOW INSERTION LOSS COAXIAL THROUGH-HOLE FOR HIGHSPEED INPUT-OUPUT

PACKAGING ARCHITECTURE WITH ROUNDED TRACES FOR ON-PACKAGE HIGH-SPEE...

PACKAGING ARCHITECTURE WITH TRENCH VIA ROUTING FOR ON-PACKAGE HIGH-...

INTEGRATED CIRCUIT PACKAGES WITH SILVER AND SILICON NITRIDE MULTI-L...

METHODS AND APPARATUS TO IMPROVE SIGNAL INTEGRITY PERFORMANCE IN IN...

STACKED VIA MODULATOR IN HIGH SPEED INTERCONNECT

POWER DELIVERY FOR EMBEDDED BRIDGE DIE UTILIZING TRENCH STRUCTURES

POWER DELIVERY FOR EMBEDDED BRIDGE DIE UTILIZING TRENCH STRUCTURES

GLASS SUBSTRATES HAVING SIGNAL SHIELDING FOR USE WITH SEMICONDUCTOR...

OPTICAL WAVEGUIDES WITHIN A GLASS SUBSTRATE TO OPTICALLY COUPLE DIE...

MULTI LAYER PACKAGE SUBSTRATE HAVING DIFFERENT DIELECTRIC MATERIALS...

GROUND VIA CLUSTERING FOR CROSSTALK MITIGATION

THROUGH-SUBSTRATE OPTICAL VIAS

HETEROGENOUS SOCKET CONTACT FOR ELECTRICAL AND MECHANICAL PERFORMAN...

DIELECTRIC-FILLED TRENCH ISOLATION OF VIAS

OPTICAL MULTICHIP PACKAGE WITH MULTIPLE SYSTEM-ON-CHIP DIES

SELECTIVE GROUND FLOOD AROUND REDUCED LAND PAD ON PACKAGE BASE LAYE...

HIGH BANDWIDTH OPTICAL INTERCONNECTION ARCHITECTURES

HORIZONTAL PITCH TRANSLATION USING EMBEDDED BRIDGE DIES

GROUND VIA CLUSTERING FOR CROSSTALK MITIGATION

ENABLING LONG INTERCONNECT BRIDGES