Ken Creta

Person

Gig Harbor, WA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Sharing memory and I/O services between nodes
- Patent number 10,915,468
- Issue date Feb 9, 2021
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing common caching agent for core and integrated input/output...
- Patent number 9,575,895
- Issue date Feb 21, 2017
- Intel Corporation
- Yen-Cheng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing common caching agent for core and integrated input/output...
- Patent number 8,984,228
- Issue date Mar 17, 2015
- Intel Corporation
- Yen-Cheng Liu
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Methods and apparatuses for flushing write-combined data from a buffer
- Patent number 8,468,278
- Issue date Jun 18, 2013
- Intel Corporation
- Sivakumar Radhakrishnan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Write combining protocol between processors and chipsets
- Patent number 8,412,855
- Issue date Apr 2, 2013
- Intel Corporation
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stream priority
- Patent number 8,347,011
- Issue date Jan 1, 2013
- Intel Corporation
- William T. Futral
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for broadcasting messages on a point-to-point interconnect
- Patent number 8,347,018
- Issue date Jan 1, 2013
- Intel Corporation
- Keshavan K. Tiruvallur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stream priority
- Patent number 8,205,026
- Issue date Jun 19, 2012
- Intel Corporation
- William T. Futral
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for the synchronization of distributed caches
- Patent number 8,046,539
- Issue date Oct 25, 2011
- Intel Corporation
- Robert T George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stream priority
- Patent number 8,006,017
- Issue date Aug 23, 2011
- Intel Corporation
- William T. Futral
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-node chipset lock flow with peer-to-peer non-posted I/O requests
- Patent number 7,996,572
- Issue date Aug 9, 2011
- Intel Corporation
- Robert G. Blankenship
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write combining protocol between processors and chipsets
- Patent number 7,676,603
- Issue date Mar 9, 2010
- Intel Corporation
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for broadcasting messages on a point-to-point interconnect
- Patent number 7,596,653
- Issue date Sep 29, 2009
- Intel Corporation
- Keshavan K. Tiruvallur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for the synchronization of distributed caches
- Patent number 7,546,422
- Issue date Jun 9, 2009
- Intel Corporation
- Robert T George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Chipset feature detection and configuration by an I/O device
- Patent number 7,363,393
- Issue date Apr 22, 2008
- Intel Corporation
- William T. Futral
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methodology and apparatus for implementing write combining
- Patent number 7,353,301
- Issue date Apr 1, 2008
- Intel Corporation
- Sivakumar Radhakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
General input/output architecture, protocol and related methods to...
- Patent number 7,353,313
- Issue date Apr 1, 2008
- Intel Corporation
- Eric R. Wehage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transmitting peer-to-peer transactions through a coherent interface
- Patent number 7,210,000
- Issue date Apr 24, 2007
- Intel Corporation
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for combining writes to I/O
- Patent number 7,206,865
- Issue date Apr 17, 2007
- Intel Corporation
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and an apparatus to efficiently handle read completions that...
- Patent number 7,185,127
- Issue date Feb 27, 2007
- Intel Corporation
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for handling completion packets with a non-successful comple...
- Patent number 7,184,399
- Issue date Feb 27, 2007
- Intel Corporation
- David M. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Separating transactions into different virtual channels
- Patent number 7,165,131
- Issue date Jan 16, 2007
- Intel Corporation
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reordering unrelated transactions from an ordered interface
- Patent number 7,162,546
- Issue date Jan 9, 2007
- Intel Corporation
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
General input/output architecture, protocol and related methods to...
- Patent number 7,152,128
- Issue date Dec 19, 2006
- Intel Corporation
- Eric R. Wehage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for pipelining ordered input/output transactio...
- Patent number 7,124,252
- Issue date Oct 17, 2006
- Intel Corporation
- Manoj Khare
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory eviction policy for combining write transactions
- Patent number 7,089,362
- Issue date Aug 8, 2006
- Intel Corporation
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and an apparatus to efficiently handle read completions that...
- Patent number 7,000,041
- Issue date Feb 14, 2006
- Intel Corporation
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system to improve prefetching operations
- Patent number 6,978,351
- Issue date Dec 20, 2005
- Intel Corporation
- Randy B. Osborne
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for handling I/O transactions with known transaction leng...
- Patent number 6,976,129
- Issue date Dec 13, 2005
- Intel Corporation
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Peer-to-peer bus segment bridging
- Patent number 6,976,115
- Issue date Dec 13, 2005
- Intel Corporation
- Kenneth Creta
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SHARING MEMORY AND I/O SERVICES BETWEEN NODES
- Publication number 20220012189
- Publication date Jan 13, 2022
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARING MEMORY AND I/O SERVICES BETWEEN NODES
- Publication number 20210303482
- Publication date Sep 30, 2021
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARING MEMORY AND I/O SERVICES BETWEEN NODES
- Publication number 20170004098
- Publication date Jan 5, 2017
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Providing Common Caching Agent For Core And Integrated Input/Output...
- Publication number 20150143051
- Publication date May 21, 2015
- Intel Corporation
- Yen-Cheng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIMODAL FUNCTIONALITY BETWEEN COHERENT LINK AND MEMORY EXPANSION
- Publication number 20150058524
- Publication date Feb 26, 2015
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Providing Common Caching Agent For Core And Integrated Input/Output...
- Publication number 20130151782
- Publication date Jun 13, 2013
- Yen-Cheng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAM PRIORITY
- Publication number 20120042106
- Publication date Feb 16, 2012
- William T. Futral
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAM PRIORITY
- Publication number 20120036291
- Publication date Feb 9, 2012
- William T. Futral
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITE COMBINING PROTOCOL BETWEEN PROCESSORS AND CHIPSETS
- Publication number 20100332686
- Publication date Dec 30, 2010
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR BROADCASTING MESSAGES ON A POINT-TO-POINT INTERCONNECT
- Publication number 20100017458
- Publication date Jan 21, 2010
- Keshavan K. Tiruvallur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APARATUS FOR THE SYNCHRONIZATION OF DISTRIBUTED CACHES
- Publication number 20090240894
- Publication date Sep 24, 2009
- Intel Corporation
- Robert T. George
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Apparatuses for Flushing Write-Combined Data From A Buffer
- Publication number 20090031058
- Publication date Jan 29, 2009
- Sivakumar Radhakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Firm partitioning in a system with a point-to-point interconnect
- Publication number 20070150699
- Publication date Jun 28, 2007
- Ioannis T. Schoinas
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
General input/output architecture, protocol and related methods to...
- Publication number 20070038793
- Publication date Feb 15, 2007
- Eric R. Wehage
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Chipset feature detection and configuration by an I/O device
- Publication number 20060136611
- Publication date Jun 22, 2006
- William T. Futral
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Stream priority
- Publication number 20060136639
- Publication date Jun 22, 2006
- Intel Corporation
- William T. Futral
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Technique for broadcasting messages on a point-to-point interconnect
- Publication number 20060101183
- Publication date May 11, 2006
- Keshavan K. Tiruvallur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methodology and apparatus for implementing write combining
- Publication number 20060095609
- Publication date May 4, 2006
- Sivakumar Radhakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and an apparatus to efficiently handle read completions that...
- Publication number 20060059292
- Publication date Mar 16, 2006
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory read requests passing memory writes
- Publication number 20050289306
- Publication date Dec 29, 2005
- Sridhar Muthrasanallur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-node chipset lock flow with peer-to-peer non-posted I/O requests
- Publication number 20050273400
- Publication date Dec 8, 2005
- Intel Corporation
- Robert G. Blankenship
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
I/O configuration messaging within a link-based computing system
- Publication number 20050262391
- Publication date Nov 24, 2005
- Prashant Sethi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Separating transactions into different virtual channels
- Publication number 20050251612
- Publication date Nov 10, 2005
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transmitting peer-to-peer transactions through a coherent interface
- Publication number 20050251611
- Publication date Nov 10, 2005
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Write combining protocol between processors and chipsets
- Publication number 20050235067
- Publication date Oct 20, 2005
- Intel Corporation
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for configuration of processor integrated devices...
- Publication number 20050210229
- Publication date Sep 22, 2005
- Prashant Sethi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Opportunistic read completion combining
- Publication number 20040205270
- Publication date Oct 14, 2004
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for combining writes to I/O
- Publication number 20040193757
- Publication date Sep 30, 2004
- Kenneth C. Creta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Handling service requests
- Publication number 20040177172
- Publication date Sep 9, 2004
- Intel Corporation
- Thai Q. Nguyen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system to improve prefetching operations
- Publication number 20040128449
- Publication date Jul 1, 2004
- Randy B. Osborne
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Sharing memory and I/O services between nodes

Providing common caching agent for core and integrated input/output...

Providing common caching agent for core and integrated input/output...

Methods and apparatuses for flushing write-combined data from a buffer

Write combining protocol between processors and chipsets

Stream priority

Techniques for broadcasting messages on a point-to-point interconnect

Stream priority

Method and apparatus for the synchronization of distributed caches

Stream priority

Multi-node chipset lock flow with peer-to-peer non-posted I/O requests

Write combining protocol between processors and chipsets

Technique for broadcasting messages on a point-to-point interconnect

Method and apparatus for the synchronization of distributed caches

Chipset feature detection and configuration by an I/O device

Methodology and apparatus for implementing write combining

General input/output architecture, protocol and related methods to...

Transmitting peer-to-peer transactions through a coherent interface

Apparatus and method for combining writes to I/O

Method and an apparatus to efficiently handle read completions that...

Method for handling completion packets with a non-successful comple...

Separating transactions into different virtual channels

Reordering unrelated transactions from an ordered interface

General input/output architecture, protocol and related methods to...

Method and apparatus for pipelining ordered input/output transactio...

Cache memory eviction policy for combining write transactions

Method and an apparatus to efficiently handle read completions that...

Method and system to improve prefetching operations

Mechanism for handling I/O transactions with known transaction leng...

Peer-to-peer bus segment bridging

Patents Applicationslast 30 patents

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

SHARING MEMORY AND I/O SERVICES BETWEEN NODES

Providing Common Caching Agent For Core And Integrated Input/Output...

BIMODAL FUNCTIONALITY BETWEEN COHERENT LINK AND MEMORY EXPANSION

Providing Common Caching Agent For Core And Integrated Input/Output...

STREAM PRIORITY

STREAM PRIORITY

WRITE COMBINING PROTOCOL BETWEEN PROCESSORS AND CHIPSETS

TECHNIQUES FOR BROADCASTING MESSAGES ON A POINT-TO-POINT INTERCONNECT

METHOD AND APARATUS FOR THE SYNCHRONIZATION OF DISTRIBUTED CACHES

Methods and Apparatuses for Flushing Write-Combined Data From A Buffer

Firm partitioning in a system with a point-to-point interconnect

General input/output architecture, protocol and related methods to...

Chipset feature detection and configuration by an I/O device

Stream priority

Technique for broadcasting messages on a point-to-point interconnect

Methodology and apparatus for implementing write combining

Method and an apparatus to efficiently handle read completions that...

Memory read requests passing memory writes

Multi-node chipset lock flow with peer-to-peer non-posted I/O requests

I/O configuration messaging within a link-based computing system

Separating transactions into different virtual channels

Transmitting peer-to-peer transactions through a coherent interface

Write combining protocol between processors and chipsets

Method and system for configuration of processor integrated devices...

Opportunistic read completion combining

Apparatus and method for combining writes to I/O

Handling service requests

Method and system to improve prefetching operations