Ken Jian Ming Wang

Person

San Francisco, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Low cost lead frame package and method for forming same
- Patent number 8,269,321
- Issue date Sep 18, 2012
- Broadcom Corporation
- Ken Jian Ming Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package with etched leadframe for package-on-pac...
- Patent number 8,269,323
- Issue date Sep 18, 2012
- Broadcom Corporation
- Rezaur Rahman Khan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Printed circuit board with coextensive electrical connectors and co...
- Patent number 8,217,522
- Issue date Jul 10, 2012
- SanDisk Technologies Inc.
- Chih-Chin Liao
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Semiconductor die having increased usable area
- Patent number 8,193,613
- Issue date Jun 5, 2012
- Broadcom Corporation
- Ken Jian Ming Wang
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Hidden plating traces
- Patent number 8,129,272
- Issue date Mar 6, 2012
- SanDisk Technologies Inc.
- Hem Takiar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Padless substrate for surface mounted components
- Patent number 7,967,184
- Issue date Jun 28, 2011
- SanDisk Corporation
- Chih-Chin Liao
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Lead frame-BGA package with enhanced thermal performance and I/O co...
- Patent number 7,872,335
- Issue date Jan 18, 2011
- Broadcom Corporation
- Rezaur Rahman Khan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Rounded contact fingers on substrate/PCB for crack prevention
- Patent number 7,806,731
- Issue date Oct 5, 2010
- SanDisk Corporation
- Hem Takiar
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Printed circuit board with coextensive electrical connectors and co...
- Patent number 7,746,661
- Issue date Jun 29, 2010
- SanDisk Corporation
- Chih-Chin Liao
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit package with etched leadframe for package-on-pac...
- Patent number 7,618,849
- Issue date Nov 17, 2009
- Broadcom Corporation
- Rezaur Rahman Khan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hidden plating traces
- Patent number 7,592,699
- Issue date Sep 22, 2009
- SanDisk Corporation
- Hem Takiar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate warpage control and continuous electrical enhancement
- Patent number 7,538,438
- Issue date May 26, 2009
- SanDisk Corporation
- Cheemen Yu
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Rigid wave pattern design on chip carrier substrate and printed cir...
- Patent number 7,355,283
- Issue date Apr 8, 2008
- SanDisk Corporation
- Chin-Tien Chiu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Printed Circuit Board With Coextensive Electrical Connectors And Co...
- Publication number 20120273968
- Publication date Nov 1, 2012
- Chih-Chin Liao
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
DIRECT THROUGH VIA WAFER LEVEL FANOUT PACKAGE
- Publication number 20120187545
- Publication date Jul 26, 2012
- BROADCOM CORPORATION
- Rezaur Rahman Khan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIDDEN PLATING TRACES
- Publication number 20120164828
- Publication date Jun 28, 2012
- Hem Takiar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Printed Circuit Board With Coextensive Electrical Connectors And Co...
- Publication number 20100252315
- Publication date Oct 7, 2010
- Chih-Chin Liao
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH ETCHED LEADFRAME FOR PACKAGE-ON-PAC...
- Publication number 20100019360
- Publication date Jan 28, 2010
- BROADCOM CORPORATION
- Rezaur Rahman Khan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIDDEN PLATING TRACES
- Publication number 20090263969
- Publication date Oct 22, 2009
- Hem Takiar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEPOPULATING INTEGRATED CIRCUIT PACKAGE BALL LOCATIONS TO ENABLE IM...
- Publication number 20090194872
- Publication date Aug 6, 2009
- BROADCOM CORPORATION
- Ken Jian Ming Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE-ATTACH MATERIAL OVERFLOW CONTROL FOR DIE PROTECTION IN INTEGRAT...
- Publication number 20090108473
- Publication date Apr 30, 2009
- BROADCOM CORPORATION
- Ken Jian Ming Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE WITH ETCHED LEADFRAME FOR PACKAGE-ON-PAC...
- Publication number 20090102030
- Publication date Apr 23, 2009
- BROADCOM CORPORATION
- Rezaur Rahman Khan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor die having increased usable area
- Publication number 20080220220
- Publication date Sep 11, 2008
- Ken Jian Ming Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor die for increasing yield and usable wafer area
- Publication number 20080220206
- Publication date Sep 11, 2008
- Ken Jian Ming Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Printed circuit board with coextensive electrical connectors and co...
- Publication number 20070284727
- Publication date Dec 13, 2007
- Chih-Chin Liao
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Ken Jian Ming Wang

Person

Patents Grantslast 30 patents

Low cost lead frame package and method for forming same

Integrated circuit package with etched leadframe for package-on-pac...

Printed circuit board with coextensive electrical connectors and co...

Semiconductor die having increased usable area

Hidden plating traces

Padless substrate for surface mounted components

Lead frame-BGA package with enhanced thermal performance and I/O co...

Rounded contact fingers on substrate/PCB for crack prevention

Printed circuit board with coextensive electrical connectors and co...

Integrated circuit package with etched leadframe for package-on-pac...

Hidden plating traces

Substrate warpage control and continuous electrical enhancement

Rigid wave pattern design on chip carrier substrate and printed cir...

Patents Applicationslast 30 patents

Printed Circuit Board With Coextensive Electrical Connectors And Co...

DIRECT THROUGH VIA WAFER LEVEL FANOUT PACKAGE

HIDDEN PLATING TRACES

Printed Circuit Board With Coextensive Electrical Connectors And Co...

INTEGRATED CIRCUIT PACKAGE WITH ETCHED LEADFRAME FOR PACKAGE-ON-PAC...

HIDDEN PLATING TRACES

DEPOPULATING INTEGRATED CIRCUIT PACKAGE BALL LOCATIONS TO ENABLE IM...

DIE-ATTACH MATERIAL OVERFLOW CONTROL FOR DIE PROTECTION IN INTEGRAT...

INTEGRATED CIRCUIT PACKAGE WITH ETCHED LEADFRAME FOR PACKAGE-ON-PAC...

Semiconductor die having increased usable area

Semiconductor die for increasing yield and usable wafer area

Printed circuit board with coextensive electrical connectors and co...