Ken Oowada

Person

Fujisawa City, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Edge word line concurrent programming with verify for memory appara...
- Patent number 12,046,302
- Issue date Jul 23, 2024
- SanDisk Technologies LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Positive TCO voltage to dummy select transistors in 3D memory
- Patent number 11,901,007
- Issue date Feb 13, 2024
- SanDisk Technologies LLC
- Ken Oowada
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
EP cycling dependent asymmetric/symmetric VPASS conversion in non-v...
- Patent number 11,894,081
- Issue date Feb 6, 2024
- SanDisk Technologies LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with sub-block based self-boosting scheme
- Patent number 11,688,469
- Issue date Jun 27, 2023
- SanDisk Technologies LLC
- Dengtao Zhao
- G11 - INFORMATION STORAGE
Information Patent Grant
Reliability compensation for uneven NAND block degradation
- Patent number 11,646,081
- Issue date May 9, 2023
- SanDisk Technologies LLC
- Xiang Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Programming memory cells with concurrent redundant storage of data...
- Patent number 11,625,172
- Issue date Apr 11, 2023
- SanDisk Technologies LLC
- Xiang Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programming memory cells with concurrent storage of multi-level dat...
- Patent number 11,551,781
- Issue date Jan 10, 2023
- SanDisk Technologies LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent programming of multiple cells for non-volatile memory de...
- Patent number 11,545,221
- Issue date Jan 3, 2023
- SanDisk Technologies LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device containing a shared word line drive...
- Patent number 11,501,821
- Issue date Nov 15, 2022
- SanDisk Technologies LLC
- Hiroyuki Ogawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Block quality classification at testing for non-volatile memory, an...
- Patent number 11,397,635
- Issue date Jul 26, 2022
- SanDisk Technologies LLC
- Shih-Chung Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Threshold voltage setting with boosting read scheme
- Patent number 11,348,649
- Issue date May 31, 2022
- SanDisk Technologies LLC
- Kiyohiko Sakakibara
- G11 - INFORMATION STORAGE
Information Patent Grant
Buried source line structure for boosting read scheme
- Patent number 11,342,006
- Issue date May 24, 2022
- SanDisk Technologies LLC
- Kiyohiko Sakakibara
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with switchable erase methods
- Patent number 11,342,029
- Issue date May 24, 2022
- SanDisk Technologies LLC
- Ken Oowada
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent programming of multiple cells for non-volatile memory de...
- Patent number 11,342,028
- Issue date May 24, 2022
- SanDisk Technologies LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device containing a shared word line drive...
- Patent number 11,322,483
- Issue date May 3, 2022
- SanDisk Technologies LLC
- Hiroyuki Ogawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Boosting read scheme with back-gate bias
- Patent number 11,227,663
- Issue date Jan 18, 2022
- SanDisk Technologies LLC
- Kiyohiko Sakakibara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double write/read throughput by CMOS adjacent array (CaA) NAND memory
- Patent number 11,189,335
- Issue date Nov 30, 2021
- SanDisk Technologies LLC
- Masatoshi Nishikawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device including different height memory s...
- Patent number 11,094,715
- Issue date Aug 17, 2021
- SanDisk Technologies LLC
- Zhixin Cui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modulation of programming voltage during cycling
- Patent number 11,049,580
- Issue date Jun 29, 2021
- SanDisk Technologies LLC
- Rajdeep Gautam
- G11 - INFORMATION STORAGE
Information Patent Grant
Read operation for non-volatile memory with compensation for adjace...
- Patent number 11,024,393
- Issue date Jun 1, 2021
- SanDisk Technologies LLC
- Zhiping Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Modulation of programming voltage during cycling
- Patent number 11,004,525
- Issue date May 11, 2021
- SanDisk Technologies LLC
- Rajdeep Gautam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Threshold voltage setting with boosting read scheme
- Patent number 11,004,518
- Issue date May 11, 2021
- SanDisk Technologies LLC
- Kiyohiko Sakakibara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Adaptive VPASS for 3D flash memory with pair string structure
- Patent number 10,978,152
- Issue date Apr 13, 2021
- SanDisk Technologies LLC
- Rajdeep Gautam
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive VPASS for 3D flash memory with pair string structure
- Patent number 10,971,231
- Issue date Apr 6, 2021
- SanDisk Technologies LLC
- Rajdeep Gautam
- G11 - INFORMATION STORAGE
Information Patent Grant
Boosting read scheme with back-gate bias
- Patent number 10,957,401
- Issue date Mar 23, 2021
- SanDisk Technologies LLC
- Kiyohiko Sakakibara
- G11 - INFORMATION STORAGE
Information Patent Grant
Boosting read scheme with back-gate bias
- Patent number 10,950,311
- Issue date Mar 16, 2021
- SanDisk Technologies LLC
- Kiyohiko Sakakibara
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device with locally modulated threshold vo...
- Patent number 10,756,106
- Issue date Aug 25, 2020
- SanDisk Technologies LLC
- Masatoshi Nishikawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three-dimensional memory device including different height memory s...
- Patent number 10,741,579
- Issue date Aug 11, 2020
- SanDisk Technologies LLC
- Zhixin Cui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Program sequencing
- Patent number 9,865,352
- Issue date Jan 9, 2018
- SanDisk Technologies, LLC
- Xiaochang Miao
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with prior state sensing
- Patent number 9,548,130
- Issue date Jan 17, 2017
- SanDisk Technologies LLC
- Deepanshu Dutta
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
EP CYCLING DEPENDENT ASYMMETRIC/SYMMETRIC VPASS CONVERSION IN NON-V...
- Publication number 20230282295
- Publication date Sep 7, 2023
- SANDISK TECHNOLOGIES LLC
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
EDGE WORD LINE CONCURRENT PROGRAMMING WITH VERIFY FOR MEMORY APPARA...
- Publication number 20230197172
- Publication date Jun 22, 2023
- SANDISK TECHNOLOGIES LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Application
POSITIVE TCO VOLTAGE TO DUMMY SELECT TRANSISTORS IN 3D MEMORY
- Publication number 20230128177
- Publication date Apr 27, 2023
- SANDISK TECHNOLOGIES LLC
- Ken Oowada
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH SUB-BLOCK BASED SELF-BOOSTING SCHEME
- Publication number 20230050955
- Publication date Feb 16, 2023
- SANDISK TECHNOLOGIES LLC
- Dengtao Zhao
- G11 - INFORMATION STORAGE
Information Patent Application
RELIABILITY COMPENSATION FOR UNEVEN NAND BLOCK DEGRADATION
- Publication number 20230041476
- Publication date Feb 9, 2023
- SANDISK TECHNOLOGIES LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING MEMORY CELLS WITH CONCURRENT REDUNDANT STORAGE OF DATA...
- Publication number 20220404989
- Publication date Dec 22, 2022
- SANDISK TECHNOLOGIES LLC
- Xiang Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMING MEMORY CELLS WITH CONCURRENT STORAGE OF MULTI-LEVEL DAT...
- Publication number 20220406398
- Publication date Dec 22, 2022
- SANDISK TECHNOLOGIES LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Application
BURIED SOURCE LINE STRUCTURE FOR BOOSTING READ SCHEME
- Publication number 20220254382
- Publication date Aug 11, 2022
- SANDISK TECHNOLOGIES LLC
- Kiyohiko Sakakibara
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE CONTAINING A SHARED WORD LINE DRIVE...
- Publication number 20220139878
- Publication date May 5, 2022
- SANDISK TECHNOLOGIES LLC
- Hiroyuki OGAWA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE CONTAINING A SHARED WORD LINE DRIVE...
- Publication number 20220139441
- Publication date May 5, 2022
- SANDISK TECHNOLOGIES LLC
- Hiroyuki OGAWA
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH SWITCHABLE ERASE METHODS
- Publication number 20220101926
- Publication date Mar 31, 2022
- SANDISK TECHNOLOGIES LLC
- Ken Oowada
- G11 - INFORMATION STORAGE
Information Patent Application
CONCURRENT PROGRAMMING OF MULTIPLE CELLS FOR NON-VOLATILE MEMORY DE...
- Publication number 20210358553
- Publication date Nov 18, 2021
- SANDISK TECHNOLOGIES LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Application
CONCURRENT PROGRAMMING OF MULTIPLE CELLS FOR NON-VOLATILE MEMORY DE...
- Publication number 20210233589
- Publication date Jul 29, 2021
- SANDISK TECHNOLOGIES LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Application
BLOCK QUALITY CLASSIFICATION AT TESTING FOR NON-VOLATILE MEMORY, AN...
- Publication number 20210173734
- Publication date Jun 10, 2021
- SANDISK TECHNOLOGIES LLC
- Shih-Chung Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BOOSTING READ SCHEME WITH BACK-GATE BIAS
- Publication number 20210174881
- Publication date Jun 10, 2021
- SANDISK TECHNOLOGIES LLC
- Kiyohiko Sakakibara
- G11 - INFORMATION STORAGE
Information Patent Application
DOUBLE WRITE/READ THROUGHPUT BY CAA NAND
- Publication number 20210142841
- Publication date May 13, 2021
- SANDISK TECHNOLOGIES LLC
- Masatoshi Nishikawa
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BOOSTING READ SCHEME WITH BACK-GATE BIAS
- Publication number 20200411115
- Publication date Dec 31, 2020
- SANDISK TECHNOLOGIES LLC
- Kiyohiko Sakakibara
- G11 - INFORMATION STORAGE
Information Patent Application
THRESHOLD VOLTAGE SETTING WITH BOOSTING READ SCHEME
- Publication number 20200411113
- Publication date Dec 31, 2020
- SANDISK TECHNOLOGIES LLC
- Kiyohiko Sakakibara
- G11 - INFORMATION STORAGE
Information Patent Application
THRESHOLD VOLTAGE SETTING WITH BOOSTING READ SCHEME
- Publication number 20200411114
- Publication date Dec 31, 2020
- SANDISK TECHNOLOGIES LLC
- Kiyohiko Sakakibara
- G11 - INFORMATION STORAGE
Information Patent Application
BOOSTING READ SCHEME WITH BACK-GATE BIAS
- Publication number 20200411112
- Publication date Dec 31, 2020
- SANDISK TECHNOLOGIES LLC
- Kiyohiko Sakakibara
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE INCLUDING DIFFERENT HEIGHT MEMORY S...
- Publication number 20200335518
- Publication date Oct 22, 2020
- SANDISK TECHNOLOGIES LLC
- Zhixin CUI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE INCLUDING DIFFERENT HEIGHT MEMORY S...
- Publication number 20200185405
- Publication date Jun 11, 2020
- SANDISK TECHNOLOGIES LLC
- Zhixin CUI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE WITH LOCALLY MODULATED THRESHOLD VO...
- Publication number 20200168623
- Publication date May 28, 2020
- SANDISK TECHNOLOGIES LLC
- Masatoshi NISHIKAWA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROGRAM SEQUENCING
- Publication number 20170125101
- Publication date May 4, 2017
- SanDisk Technologies, Inc.
- Xiaochang Miao
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE BIT LINE VOLTAGE SENSING FOR NON-VOLATILE MEMORY
- Publication number 20160300620
- Publication date Oct 13, 2016
- SANDISK TECHNOLOGIES INC.
- Deepanshu Dutta
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH PRIOR STATE SENSING
- Publication number 20160300619
- Publication date Oct 13, 2016
- SANDISK TECHNOLOGIES INC.
- Deepanshu Dutta
- G11 - INFORMATION STORAGE
Information Patent Application
Partial Block Erase For Block Programming In Non-Volatile Memory
- Publication number 20160217860
- Publication date Jul 28, 2016
- SANDISK TECHNOLOGIES INC.
- Chun-hung Lai
- G11 - INFORMATION STORAGE
Information Patent Application
Optimizing Pass Voltage And Initial Program Voltage Based On Perfor...
- Publication number 20150170746
- Publication date Jun 18, 2015
- SANDISK TECHNOLOGIES INC.
- Ken Oowada
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic Bit Line Bias For Programming Non-Volatile Memory
- Publication number 20150092496
- Publication date Apr 2, 2015
- SANDISK TECHNOLOGIES INC.
- Deepanshu Dutta
- G11 - INFORMATION STORAGE
Information Patent Application
BIT LINE CURRENT TRIP POINT MODULATION FOR READING NONVOLATILE STOR...
- Publication number 20140269083
- Publication date Sep 18, 2014
- SANDISK TECHNOLOGIES INC.
- Man L. Mui
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Edge word line concurrent programming with verify for memory appara...

Positive TCO voltage to dummy select transistors in 3D memory

EP cycling dependent asymmetric/symmetric VPASS conversion in non-v...

Non-volatile memory with sub-block based self-boosting scheme

Reliability compensation for uneven NAND block degradation

Programming memory cells with concurrent redundant storage of data...

Programming memory cells with concurrent storage of multi-level dat...

Concurrent programming of multiple cells for non-volatile memory de...

Three-dimensional memory device containing a shared word line drive...

Block quality classification at testing for non-volatile memory, an...

Threshold voltage setting with boosting read scheme

Buried source line structure for boosting read scheme

Non-volatile memory with switchable erase methods

Concurrent programming of multiple cells for non-volatile memory de...

Three-dimensional memory device containing a shared word line drive...

Boosting read scheme with back-gate bias

Double write/read throughput by CMOS adjacent array (CaA) NAND memory

Three-dimensional memory device including different height memory s...

Modulation of programming voltage during cycling

Read operation for non-volatile memory with compensation for adjace...

Modulation of programming voltage during cycling

Threshold voltage setting with boosting read scheme

Adaptive VPASS for 3D flash memory with pair string structure

Adaptive VPASS for 3D flash memory with pair string structure

Boosting read scheme with back-gate bias

Boosting read scheme with back-gate bias

Three-dimensional memory device with locally modulated threshold vo...

Three-dimensional memory device including different height memory s...

Program sequencing

Non-volatile memory with prior state sensing

Patents Applicationslast 30 patents

EP CYCLING DEPENDENT ASYMMETRIC/SYMMETRIC VPASS CONVERSION IN NON-V...

EDGE WORD LINE CONCURRENT PROGRAMMING WITH VERIFY FOR MEMORY APPARA...

POSITIVE TCO VOLTAGE TO DUMMY SELECT TRANSISTORS IN 3D MEMORY

NON-VOLATILE MEMORY WITH SUB-BLOCK BASED SELF-BOOSTING SCHEME

RELIABILITY COMPENSATION FOR UNEVEN NAND BLOCK DEGRADATION

PROGRAMMING MEMORY CELLS WITH CONCURRENT REDUNDANT STORAGE OF DATA...

PROGRAMMING MEMORY CELLS WITH CONCURRENT STORAGE OF MULTI-LEVEL DAT...

BURIED SOURCE LINE STRUCTURE FOR BOOSTING READ SCHEME

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING A SHARED WORD LINE DRIVE...

THREE-DIMENSIONAL MEMORY DEVICE CONTAINING A SHARED WORD LINE DRIVE...

NON-VOLATILE MEMORY WITH SWITCHABLE ERASE METHODS

CONCURRENT PROGRAMMING OF MULTIPLE CELLS FOR NON-VOLATILE MEMORY DE...

CONCURRENT PROGRAMMING OF MULTIPLE CELLS FOR NON-VOLATILE MEMORY DE...

BLOCK QUALITY CLASSIFICATION AT TESTING FOR NON-VOLATILE MEMORY, AN...

BOOSTING READ SCHEME WITH BACK-GATE BIAS

DOUBLE WRITE/READ THROUGHPUT BY CAA NAND

BOOSTING READ SCHEME WITH BACK-GATE BIAS

THRESHOLD VOLTAGE SETTING WITH BOOSTING READ SCHEME

THRESHOLD VOLTAGE SETTING WITH BOOSTING READ SCHEME

BOOSTING READ SCHEME WITH BACK-GATE BIAS

THREE-DIMENSIONAL MEMORY DEVICE INCLUDING DIFFERENT HEIGHT MEMORY S...

THREE-DIMENSIONAL MEMORY DEVICE INCLUDING DIFFERENT HEIGHT MEMORY S...

THREE-DIMENSIONAL MEMORY DEVICE WITH LOCALLY MODULATED THRESHOLD VO...

PROGRAM SEQUENCING

MULTIPLE BIT LINE VOLTAGE SENSING FOR NON-VOLATILE MEMORY

NON-VOLATILE MEMORY WITH PRIOR STATE SENSING

Partial Block Erase For Block Programming In Non-Volatile Memory

Optimizing Pass Voltage And Initial Program Voltage Based On Perfor...

Dynamic Bit Line Bias For Programming Non-Volatile Memory

BIT LINE CURRENT TRIP POINT MODULATION FOR READING NONVOLATILE STOR...