Kengo Aritomi

Person

Hyogo, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor memory device having memory block configuration
- Patent number 8,446,765
- Issue date May 21, 2013
- Renesas Electronics Corporation
- Taku Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having memory block configuration
- Patent number 8,208,303
- Issue date Jun 26, 2012
- Renesas Electronics Corporation
- Taku Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having memory block configuration
- Patent number 8,000,159
- Issue date Aug 16, 2011
- Renesas Electronics Corporation
- Taku Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having memory block configuration
- Patent number 7,782,672
- Issue date Aug 24, 2010
- Renesas Technology Corp.
- Taku Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having memory block configuration
- Patent number 7,447,087
- Issue date Nov 4, 2008
- Renesas Technology Corp.
- Taku Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having memory block configuration
- Patent number 7,248,513
- Issue date Jul 24, 2007
- Renesas Technology Corp.
- Taku Ogura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having hierarchical word line structure
- Patent number 6,597,624
- Issue date Jul 22, 2003
- Mitsubishi Denki Kabushiki Kaisha
- Kengo Aritomi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with memory test circuit
- Patent number 6,504,744
- Issue date Jan 7, 2003
- Mitsubishi Denki Kabushiki Kaisha
- Kengo Aritomi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with a hierarchical word line configura...
- Patent number 6,477,105
- Issue date Nov 5, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Kengo Aritomi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with a hierarchical word line configura...
- Patent number 6,407,942
- Issue date Jun 18, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Kengo Aritomi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit device that can suppress generatio...
- Patent number 6,344,763
- Issue date Feb 5, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Kengo Aritomi
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with test mode decision circuit
- Patent number 6,269,038
- Issue date Jul 31, 2001
- Mitsubishi Denki Kabushiki Kaisha
- Takashi Itou
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY BLOCK CONFIGURATION
- Publication number 20120230107
- Publication date Sep 13, 2012
- RENESAS ELECTRONICS CORPORATION
- Taku OGURA
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY BLOCK CONFIGURATION
- Publication number 20110261617
- Publication date Oct 27, 2011
- RENESAS ELECTRONICS CORPORATION
- Taku OGURA
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY BLOCK CONFIGURATION
- Publication number 20110002170
- Publication date Jan 6, 2011
- Renesas Technology Corp.
- Taku Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY BLOCK CONFIGURATION
- Publication number 20090052249
- Publication date Feb 26, 2009
- Renesas Technology Corp.
- Taku Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device having memory block configuration
- Publication number 20070297251
- Publication date Dec 27, 2007
- Renesas Technology Corp.
- Taku Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device having memory block configuration
- Publication number 20050057963
- Publication date Mar 17, 2005
- RENESAS TECHNOLOGY CORP.
- Taku Ogura
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device having reduced current dissipation in d...
- Publication number 20040196719
- Publication date Oct 7, 2004
- RENESAS TECHNOLOGY CORP.
- Kengo Aritomi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device having hierarchical word line structure
- Publication number 20020186611
- Publication date Dec 12, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Kengo Aritomi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device with a hierarchical word line configura...
- Publication number 20020097630
- Publication date Jul 25, 2002
- Mitsubishi Denki Kabushiki Kaisha
- Kengo Aritomi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device with a hierarchical word line configura...
- Publication number 20020001217
- Publication date Jan 3, 2002
- Kengo Aritomi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device with memory test circuit
- Publication number 20010053086
- Publication date Dec 20, 2001
- Mitsubishi Denki Kabushiki Kaisha
- Kengo Aritomi
- G11 - INFORMATION STORAGE

Kengo Aritomi

Person

Patents Grantslast 30 patents

Semiconductor memory device having memory block configuration

Semiconductor memory device having memory block configuration

Semiconductor memory device having memory block configuration

Semiconductor memory device having memory block configuration

Semiconductor memory device having memory block configuration

Semiconductor memory device having memory block configuration

Semiconductor memory device having hierarchical word line structure

Semiconductor memory device with memory test circuit

Semiconductor memory device with a hierarchical word line configura...

Semiconductor memory device with a hierarchical word line configura...

Semiconductor integrated circuit device that can suppress generatio...

Semiconductor memory device with test mode decision circuit

Patents Applicationslast 30 patents

SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY BLOCK CONFIGURATION

SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY BLOCK CONFIGURATION

SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY BLOCK CONFIGURATION

SEMICONDUCTOR MEMORY DEVICE HAVING MEMORY BLOCK CONFIGURATION

Semiconductor memory device having memory block configuration

Semiconductor memory device having memory block configuration

Semiconductor memory device having reduced current dissipation in d...

Semiconductor memory device having hierarchical word line structure

Semiconductor memory device with a hierarchical word line configura...

Semiconductor memory device with a hierarchical word line configura...

Semiconductor memory device with memory test circuit